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CMX264D5

Frequency Domain Split Band Scrambler

CML Microcircuits 

Frequency Domain Split Band Scrambler

CMX264

1.5.2.4 Rx Lowerband Output Filter (RXLBOPF)

A lowpass filter whose function is to select the lower sideband output of the preceding balanced

modulator. Its output is the lowerband part of the descrambled signal which is summed with the

output of the upperband Rx channel to form the complete descrambled signal.

1.5.2.5 Rx Upperband Input Filter (RXUBIPF)

A lowpass filter whose cutoff frequency is close to the upper corner frequency of the transmit channel.

Its function is to select the received scrambled signal and reject channel noise at frequencies above

this signal.

It is assumed that any transmitted 4kHz SAT tone has been attenuated prior to the Rx channel input of

the CMX264.

1.5.2.6 Rx Upperband Balanced Modulator

This modulates the output of the preceding Rx Upperband Input Filter (RXUBIPF). The carrier is

identical to that of the upperband carrier in the transmitter section. The output consists of two

sidebands.

The lower sideband is inverted with respect to the received lowerband, i.e. non-inverted with respect to

the original baseband signal. If the Tx and Rx carriers are the same frequency, the lower sideband is

the desired recovered upperband.

The upper sideband is a non-inverted, frequency shifted signal and is not required in the final

descrambled output. It is removed by the Rx Upperband Output Filter (RXUBOPF).

1.5.2.7 Rx Upperband Output Filter (RXUBOPF)

A lowpass filter whose function is to select the lower sideband output of the Rx upperband balanced

modulator. Its output is the upperband part of the descrambled signal which is summed with the output

of the lowerband Rx channel to form the complete descrambled signal.

1.5.2.8 Rx Summer

This sums the lowerband and upperband to form the complete descrambled audio signal.

1.5.2.9 Rx Channel De-Emphasis

A de-emphasis circuit at the output of the Rx descramble block. It has a slope of -6dB per octave

between 280Hz and 3140Hz. It may be selected to de-emphasise the recovered (descrambled) audio

signal. It may be selected in conjunction with the pre-emphasis circuit at the input of the Tx scramble

block.

1.5.3 Serial Interface

1.5.3.1 General Operation

The serial interface controls the internal states and modes of operation of the CMX264. Data is input to

the SDATA pin MSD (D10) first and is clocked into the device on the rising edge of SCLK. Only the

last 11 bits of data is loaded on the rising edge of CSN. The bit functions are shown in

Table 1. Also refer to the timing diagram of Figure 10.

D10

Powersave

D9

Clear/

Scramble

D8

D7

D6

MICO

RECO

EXTO

Output Control Output Control Output Control

D5 D4 D3 D2

Pre/De-Emphasis

Select/Bypass

D1 D0

Split Point

Select

Table 1

© 1999 Consumer Microcircuits Limited

9

D/CMX264/1

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