74HC280D Просмотр технического описания (PDF) - NXP Semiconductors.
Номер в каталоге
Компоненты Описание
Список матч
74HC280D Datasheet PDF : 15 Pages
| |||
Nexperia
74HC280; 74HCT280
9-bit odd/even parity generator/checker
Table 8. Measurement points
Type
Input
74HC280
74HCT280
VM
0.5VCC
1.3 V
Output
VM
0.5VCC
1.3 V
VX
0.1VCC
0.1VCC
VY
0.9VCC
0.9VCC
9,
W:
QHJDWLYH
SXOVH
90
9
WI
9,
SRVLWLYH
SXOVH
WU
90
9
W:
90
WU
WI
90
*
9,
9&&
92
'87
57
9&&
5/ 6
&/
RSHQ
DDG
Fig 6.
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance.
S1 = Test selection switch
Test circuit for measuring switching times
Table 9. Test data
Type
Input
VI
tr, tf
74HC280
VCC
6 ns
74HCT280
3V
6 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 k
1 k
S1 position
tPHL, tPLH
open
open
74HC_HCT280
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 September 2016
.
8 of 15
© Nexperia B.V. 2017. All rights reserved
Share Link: 