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RT5370N

CMOS Technology with PA, LNA, RF, Baseband, and MAC Integrated

Unspecified 

RT5370

Datasheet

(PTN_KICK)

23:20 R/W LATENCY

19 R/W AUTO_ADJUST

18:16 R/W EXT_ADJUST_SCALE

15:14 R

13:0 R/W RD_START_ADDRESS

Revision August 30, 2010

When write this bit, it will kick-off PTN run.

LATENCY of updated time of RAMP data.

0

The unit is 32 times of clock cycle.

When Running SINE mode, if turn on this bit then it will use 1

former trained value in RAMP MODE.

When disable above bit (auto_adjust = 0), then it will use 0

this value for normalization. (The full scale is 15, the

mapping relationship is:

0: 8 1:9 2:10 3:11 4:12 5:13 6:14 7:15

Reserved

0

The start address of read when taking data from PBF

14’h1000

memory in MEM mode.

PTN_WRITE_ADDRESS (offset: 0x0544, default: 0x03FF_0000)

Bits Type Name

Description

Init Value

31:30 R

Reserved

0

29:16 R/W WR_END_ADDRESS

The end address of write when storing data to PBF memory 14’h03ff

in MEM mode.

15:14 R

Reserved

0

13:0 R/W WR_START_ADDRESS

The start address of write when storing data to PBF

0

memory in MEM mode.

PTN_DETECTED_MIN_THRESHOLD_I (offset: 0x0548, default: 0x00FF_03FF)

Bits Type Name

Description

31:24 R

Reserved

23:16 R ADC_MIN_VALUE_I

The minimum output value of ADC I-channel.

15:10 R

Reserved

9:0 R DAC_MIN_LEVEL_I

The corresponding input value of DAC I-channel.

Init Value

0

8’hff

0

10’h3ff

PTN_DETECTED_MAX_THRESHOLD_I (offset: 0x054c, default: 0x0000_0000)

Bits Type Name

Description

31:24 R

Reserved

23:16 R ADC_MAX_VALUE_I

The maximum output value of ADC I-channel.

15:10 R

Reserved

9:0 R DAC_MAX_LEVEL_I

The corresponding input value of DAC I-channel.

Init Value

0

8’hff

0

10’h3ff

PTN_DETECTED_MIN_THRESHOLD_Q (offset: 0x0550, default: 0x00FF_03FF)

Bits Type Name

Description

31:24 R

Reserved

23:16 R ADC_MIN_VALUE_Q

The minimum output value of ADC Qchannel.

15:10 R

Reserved

9:0 R DAC_MIN_LEVEL_Q

The corresponding input value of DAC Q-channel.

Init Value

0

8’hff

0

10’h3ff

PTN_DETECTED_MAX_THRESHOLD_Q (offset: 0x0554, default: 0x0000_0000)

Bits Type Name

Description

31:24 R

Reserved

23:16 R ADC_MAX_VALUE_Q

The maximum output value of ADC Q-channel.

15:10 R

Reserved

9:0 R DAC_MAX_LEVEL_Q

The corresponding input value of DAC Q-channel.

Init Value

0

8’hff

0

10’h3ff

EFUSE_CTRL (offset: 0x0580, default: 0x0000_8800)

Bits Type Name

31 R

SEL_EFUSE

DSRT5370_ V1. 0_083010

Form No.：QS-073-F02

Rev.：1

Draft Description

Currently used NVM(Non-Volatile Memory)

Init Value

0

Kept by： DCC

- 19 -

Ret. Time： 5 Years

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