NXP Semiconductors
BUK9515-100A
N-channel TrenchMOS logic level FET
100
Pder
(%)
80
60
40
20
0
0
003aaf364
50
100
150
200
Tmb (°C)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature
100
WDSS
(%)
80
003aaf379
60
40
20
0
20
60
100
140
180
Tmb (°C)
ID = 75 A
Fig 3. Normalised drain-source non-repetitive
avalanche energy as a function of
mounting-base temperature
100
ID
(%)
80
60
40
20
0
0
003aaf365
40
80
120
160
200
Tmb (°C)
Fig 2.
VGS ≥ 5 V
Normalized continuous drain current as a
function of mounting base temperature
102
003aaf380
lAV
25 °C
10
Tj prior to avalanche = 150 °C
1
10−3
10−2
10−1
unclamped inductive load
1
10
tAV (ms)
Fig 4. Single-shot avalanche rating; avalanche
current as a function of avalanche period
BUK9515-100A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 19 April 2011
© NXP B.V. 2011. All rights reserved.
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