ML7029 Просмотр технического описания (PDF) - LAPIS Semiconductor Co., Ltd.
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ML7029 Datasheet PDF : 29 Pages
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FEDL7029-04
ML7029
Digital Interface
Parameter
Symbol
Condition
(VDD = 2.7 to 3.6 V, Ta = –20 to +70C)
Reference Min. Typ. Max. Unit
Digital Input/Output Setting
Time
tSDX, tSDR
tXD1, tRD1
tXD2, tRD2
tXD3, tRD3
t1
t2
1LSTTL+100 pF
0
Fig. 3-1
0
Fig. 3-2
0
0
50
50
— 200 ns
— 200 ns
— 200 ns
— 200 ns
—
—
ns
—
—
ns
t3
50
—
—
ns
t4
50
—
—
ns
t5
100 —
—
ns
Serial Port Digital Input/Output
Setting Time
t6
t7
t8
CL= 50 pF
30
—
—
ns
Fig. 4-1
Fig. 4-2
30
—
—
ns
0
—
50
ns
t9
20
—
—
ns
t10
20
—
—
ns
t11
0
—
50
ns
—
— 3.5(*6)
t12
ns
5.0(*6) —
—
Shift Clock Frequency
fEXCK
EXCK
EXCK
—
—
10
*6: Don’t raise the DEN in the range (3.5ns to 5.0ns) delayed from falling edge of the 12th EXCK.
MHz
AC Characteristics (Programmable Gain Stages)
Parameter
Symbol
Condition
(VDD = 2.7 to 3.6 V, Ta = -25 to +70C)
Min. Typ. Max. Unit
Gain Accuracy
DG
All stages, to programmed value
SYNC = 8 kHz
–1
0
+1
dB
12/29
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