TM-1100 Просмотр технического описания (PDF) - Philips Electronics
Номер в каталоге
Компоненты Описание
Список матч
TM-1100 Datasheet PDF : 8 Pages
| |||
TM-1100 Specifications
PHYSICAL
Process
Packaging
Pins
Power
C75: CMOS 0.35 micron; 5-layer metal
TE_QFP
total 240
I/O pins 3.3 V with 5 V tolerance
supply 3.3 V +/- 5%
dissipation 6W (max)
consumption 1808 mA 5.97 W
management dynamic standby less than
990 mW
CENTRAL PROCESSING UNIT
Clock Speed
133 MHz
Instruction Length variable (2 to 23 bytes); compressed
Instruction Set
arithmetic and logical ops, load/store ops.,
special multimedia and DSP ops.,
IEEE-compliant floating point ops.
Issue Slots
5
Functional Units
27, pipelined
integer and floating-point arithmetic
units, data-parallel DSP-like units
name
quantity latency recovery
constant
5
1
1
integer ALU
5
1
1
memory load/store 2
3
1
shift
2
1
1
DSPALU
2
2
1
DSP multiply
2
3
1
branch
3
3
1
float ALU
2
3
1
integer/float mul 2
3
1
float compare
1
1
1
float sqrt./divide 1 17 16
Registers
128 (32-bit width)
Special Multimedia/ total 32 ops
DSP Operations
MEMORY SYSTEM
Speed
66/80/100/133 MHz
CPU/Memory
Speed Ratios
programmable; 1:1, 5:4, 4:3, 3:2, and 2:1
Memory Size
512 KB to 64 MB (up to four ranks)
Supported Types
16-Mbit SDRAM (x4, x8, x16);
SGRAM (x32); 64-Mbit SDRAM (x32)
Width
32-bit bus
Max. Bandwidth
532 MB/sec (at 133 MHz)
Interface
glueless up to 4 16-Mbit or 2 64-Mbit
chips at 133 MHz; more chips with slower
clock and/or external buffers
Signal Levels
3.3 V LVTTL
CACHES
Access
Associativity
Block Size
Size
data 8-, 16-, 32-bit word
instruction 64 bytes
8-way set-associative with LRU replacement
64 bytes
data 16 KB
instruction 32 KB
INTERNAL DATA HIGHWAY
Protocol
64-byte block-transfer
separate 32-bit data and 32-bit address buses
PCI INTERFACE
Speed
33 MHz
Bus Width
32-bit
Address Space
32 bits (4 GB)
Voltage
drive and receive at 3.3V or 5V
Standard Compliance PCI Local Bus Specification 2.1
VIDEO IN
Supported Signals
Image Sizes
Functions
CCIR 601/656 8-bit video up to 19 Mpix/sec
raw 8-10-bit data (messages) up to 38 MB/sec
all sizes, subject to sample rate
programmable on-the-fly 2X horizontal
resolution subsampling
ENHANCED VIDEO OUT
Image Sizes
flexible, including CCIR601;
maximum 4K x 4K pixels (subject to
80 MB/sec data rate)
Input Formats
YUV 4:2:2, YUV 4:2:0
Output Formats
CCIR601/656 8-bit video, PAL or NTSC
Clock Rates
programmable (4-80 MHz), typically 27
MB/sec (13.5 Mpixels/sec for NTSC, PAL)
Transfer Speeds
80 MB/sec in data-streaming and
message-passing modes; 40 Mpix/sec in
YUV 4:2:2 mode
Functions
full 129-level alpha blending, genlock
mode, frame synchronization, chroma key,
programmable YUV color clipping
AUDIO IN / AUDIO OUT
Number of Channels 2 input; 8 output
Sample Size
8- or 16-bit samples per channel
Sample Rates
1 Hz to 100 KHz
programmable with 0.001 Hz resolution
Data Formats
8-bit mono and stereo; 16-bit mono and
stereo PC standard memory data format
External Interface
4 pins each: 1 programmable clock output,
3 flexible serial input (AI) or output (AO)
interface
Clock Source
internal or external
Native Protocol
I2S and other serial 3-wire protocols
Share Link: 