APPENDIX
3.5 List of registers
Serial I/O1 status register
b7 b6 b5 b4 b3 b2 b1 b0
Serial I/O1 status register (SIOSTS: address 1916)
b
Name
Functions
At reset R W
0 Transmit buffer
0: Buffer full
empty flag (TBE) 1: Buffer empty
0
✕
1 Receive buffer full 0: Buffer empty
flag (RBF)
1: Buffer full
0
✕
2 Transmit shift
0: Transmit shift in progress 0
✕
register shift
1: Transmit shift completed
completion flag
(TSC)
3 Overrun error flag 0: No error
(OE)
1: Overrun error
0
✕
4 Parity error flag 0: No error
0
✕
(PE)
1: Parity error
5 Framing error flag 0: No error
(FE)
1: Framing error
0
✕
6 Summing error flag 0: (OE) U (PE) U (FE) = 0
0
✕
(SE)
1: (OE) U (PE) U (FE) = 1
7 Nothing is arranged for this bit. This bit is a
1
✕
write disabled bit. When this bit is read out, the
contents are “1”.
Fig. 3.5.7 Structure of Seial I/O1 status register
3850 Group (Spec. H) User’s Manual
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