TC7MPN3245FTG(2007) Просмотр технического описания (PDF) - Toshiba

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TC7MPN3245FTG
(Rev.:2007)

TOSHIBA Digital Integrated Circuit Silicon Monolithic

Toshiba 

TC7MPN3245FTG

VCCA = 1.5 ± 0.1 V, VCCB = 3.3 ± 0.3 V

Characteristics

Symbol

Test Condition

Min Max Unit

Propagation delay time

(Bn → An)

3-state output enable time

( OE → An)

3-state output disable time

( OE → An)

Propagation delay time

(An → Bn)

3-state output enable time

( OE → Bn)

3-state output disable time

( OE → Bn)

Output-to-output skew

tpLH

tpHL

tpZL

tpZH

tpLZ

tpHZ

tpLH

tpHL

tpZL

tpZH

tpLZ

tpHZ

tosLH

tosHL

Figure 1, Figure 2

Figure 1, Figure 3

Figure 1, Figure 3

Figure 1, Figure 2

Figure 1, Figure 3

Figure 1, Figure 3

1.0 10.3

1.0 18.5 ns

1.0 13.0

1.0 16.0

1.0 22.8 ns

1.0 10.2

(Note) ⎯

1.5

ns

Note: Parameter guaranteed by design.

(tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|)

VCCA = 1.2 ± 0.1 V, VCCB = 3.3 ± 0.3 V

Characteristics

Symbol

Test Condition

Min Max Unit

Propagation delay time

(Bn → An)

3-state output enable time

( OE → An)

3-state output disable time

( OE → An)

Propagation delay time

(An → Bn)

3-state output enable time

( OE → Bn)

3-state output disable time

( OE → Bn)

Output-to-output skew

tpLH

tpHL

tpZL

tpZH

tpLZ

tpHZ

tpLH

tpHL

tpZL

tpZH

tpLZ

tpHZ

tosLH

tosHL

Figure 1, Figure 2

Figure 1, Figure 3

Figure 1, Figure 3

Figure 1, Figure 2

Figure 1, Figure 3

Figure 1, Figure 3

1.0

61

1.0

95

ns

1.0

44

1.0

29

1.0

63

ns

1.0

23

(Note) ⎯

1.5

ns

Note: Parameter guaranteed by design.

(tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|)

15

2007-10-19

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