PSB 7238
Introduction
Table 8 Power Supply (cont’d)
Pin No. Symbol Function Descriptions
12
VDD
I
36
VDD
I
60
VDD
I
93
VDD
I
34
VDD
I
41
VDD
I
52
VDD
I
58
VDD
I
65
VDD
I
10
VDDP
I
28
VDDP
I
71
VDDP
I
89
VDDA
I
Positive power supply voltage (3.0 - 3.6 V).
Note: In former versions, pins 34, 41, 52, 58 and 65
could be connected to either VDD (for special
version with external memory) or to VDDP (for
compatibility with other JADE versions). This
version requires them to be connected to VDD.
Positive power supply voltage (4.5 - 5.5 V) for external
interfaces.
Separate positive power supply voltage (3.0 - 3.6 V) for
Clock Generation Unit (Oscillator).
92
VSSA
I
Separate Ground (0 V) for Clock Generation Unit
(Oscillator).
87
VDDAP I
Separate positive power supply voltage (3.0 - 3.6 V) for
Clock Generation Unit (PLL).
88
VSSAP
I
Note: The power supply for the PLL requires pin 87
connected to VDDAP. In former versions pin 87 was
connected to VDDP.
Separate Ground (0 V) for Clock Generation Unit (PLL)
Semiconductor Group
16
Data Sheet 1998-07-01