Q67101-H6773 Просмотр технического описания (PDF) - Infineon Technologies

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Q67101-H6773

Joint Audio Decoder-Encoder - Multimode

Infineon Technologies 

PSB 7238

Introduction

Table 6

General Control

Pin No. Symbol Function Description

95

CM1 I

Clock Mode

Selects the option for the generation of the DSP internal

working clock.

85

SIO

I/O

Serial I/O line.

When programmed as input, a rising or falling

(selectable) edge on this line may generate a maskable

interrupt INT (host) or INT1 (DSP).

When programmed as output, its state is directly

controlled by the DSP or the host.

84

RESET I

Reset input. Reset time: > 1 ms.

Table 7

General Purpose I/O Interface

Pin No. Symbol Function Description

81

GP0 I/O (OD) General purpose I/O pins

80

GP1 I/O (OD)

79

GP2 I/O (OD)

78

GP3 I/O (OD)

Table 8 Power Supply

Pin No. Symbol Function Descriptions

11

VSS

I

29

VSS

I

35

VSS

I

42

VSS

I

53

VSS

I

59

VSS

I

66

VSS

I

72

VSS

I

77

VSS

I

94

VSS

I

Ground (common to VDD and VDDP).

Semiconductor Group

15

Data Sheet 1998-07-01

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