PI6C2516
Phase-Locked Loop Clock Driver
with 16 Clock Outputs 1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
Parameter Measurement Information
From Output
Under Test
22pF
500Ω
Input
50% VCC
3V
50% VCC
0V
tpd
Output
80%
20%
50% VCC
80%
VOH
20%
VOL
Load Circuit
Notes:
1. CL includes probe and jig capacitance.
2. All input pulses are supplied by generators having the following characteristics:
CLKIN ≤ 100MHz, ZO = 50 ohms, tr ≤ 1.2ns, tf ≤ 1.2ns.
3. The outputs are measured one at a time with one transition per measurement.
tr
tf
Voltage Waveforms
Propagation Delay times
CLKIN
FBIN
FBOUT
tphase error
Any Y
tsk(O)
Any Y
Any Y
tsk(O)
Phase Error and Skew Calculations
6
PS8440C 07/24/01