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MX29L3211MC-10

32M-BIT [4M x 8/2M x 16] CMOS SINGLE VOLTAGE PAGEMODE FLASH EEPROM

Macronix International 

MX29L3211

BUS OPERATION

Flash memory reads, erases and writes in-system via the local CPU . All bus cycles to or from the flash memory

conform to standard microprocessor bus cycles.

Table 2.1 Bus Operations for Word-Wide Mode (BYTE = VIH)

Mode

Notes CE

Read

1

VIL

Output Disable 1

VIL

Standby

1

VIH

Manufacturer ID 2,4

VIL

Device ID

2,4

VIL

Write

1,3

VIL

OE WE A0 A1 A9

VIL VIH X X X

VIH VIH X X X

X XXX X

VIL VIH VIL VIL VID

VIL VIH VIH VIL VID

VIH VIL X X X

Q0-Q7

DOUT

High Z

High Z

C2H

F9H

DIN

Q8-Q14

DOUT

High Z

HIgh Z

00H

00H

DIN

Q15/A-1

DOUT

HighZ

HighZ

0B

0B

DIN

Table2.2 Bus Operations for BYTE-Wide Mode (BYTE = VIL)

Mode

Read

Output Disable

Standby

Manufacturer ID

Device ID

Write

Notes CE

1

VIL

1

VIL

1

VIH

2,4 VIL

2,4 VIL

1,3 VIL

OE WE A0 A1 A9 Q0-Q7

VIL VIH X X X DOUT

VIH VIH X X X High Z

X

X X X X High Z

VIL VIH VIL VIL VID C2H

VIL VIH VIH VIL VID F9H

VIH VIL X X X DIN

Q8-Q14

HighZ

High Z

HIgh Z

High Z

High Z

High Z

Q15/A-1

VIL/VIH

X

X

VIL

VIL

VIL/VIH

NOTES :

1. X can be VIH or VIL for address or control pins.

2. A0 and A1 at VIL provide manufacturer ID codes. A0 at VIH and A1 at VIL provide device ID codes. A0 at VIL, A1 at VIH and

with appropriate sector addresses provide Sector Protect Code.(Refer to Table 4)

3. Commands for different Erase operations, Data program operations or Sector Protect operations can only be successfully

completed through proper command sequence.

4. VID = 11.5V- 12.5V.

P/N:PM0641

REV. 0.3, NOV. 06, 2001

5

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