M74HCT646 Просмотр технического описания (PDF) - STMicroelectronics
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M74HCT646 Datasheet PDF : 15 Pages
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M74HCT646
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL NAME AND FUNCTION
1
2
3
4, 5, 6, 7, 8,
9, 10, 11
20, 19, 18,
17, 16, 15,
14, 13
21
22
23
12
24
CLOCK AB A to B Clock Input (LOW
to HIGH, Edge-Triggered)
SELECT AB Select A to B Source Input
GAB Direction Control Input
A1 to A8 A Data Inputs/Outputs
B1 to B8 B Data Inputs/Outputs
G
Output Enable Input
(Active LOW)
SELECT BA Select B to A Source Input
CLOCK BA B to A Clock Input (LOW
to HIGH, Edge Triggered)
GND Ground (0V)
VCC
Positive Supply Voltage
TRUTH TABLE
G DIR CAB CBA SAB SBA
A
B
FUNCTION
INPUTS INPUTS Both the A bus and the B bus are inputs
XXXX
Z
Z
The Output functions of the A and B bus are disabled
HX
Both the A and B bus are used for inputs to the internal
X X INPUTS INPUTS flip-flops. Data at the bus will be stored on low to high
transition of the clock inputs.
INPUTS OUTPUTS The A bus are inputs and the B bus are outputs
L
X X* L X
H
L
The data at the A bus are displayed at the B bus
H
LH
L
X* L X
H
L
The data at the A bus are displayed at the B bus. The
data of the A bus are stored to internal flip-flop on low
H
to high transition of the clock pulse
X X* H X
X
Qn
The data stored to the internal flip-flop are displayed at
the B bus.
L
X* H X
H
L
The data at the A bus are stored to the internal flip-flop
on low to high transition of the clock pulse. The states
H
of the internal flip-flops output directly to the B bus.
OUTPUTS INPUTS The B bus are inputs and the A bus are outputs.
L
X* X X L
H
L
The data at the B bus are displayed at the A bus
H
X*
LL
L
XL
H
L
The data at the B bus are displayed at the A bus. The
data of the B bus are stored to the internal flip-flop on
H
low to high transition of the clock pulse.
X* X X H
Qn
X
The data stored to the internal flip-flops are displayed
at the A bus
L
L
The data at the B bus are stored to the internal flip-flop
X*
XH
on low to high transition of the clock pulse. The states
H
H
of the internal flip-flops output directly to the A bus.
X : Don’t Care
Z : High Impedance
Qn : The data stored to the internal flip-flops by most recent low to high transition of the clock inputs
* : The data at the A and B bus will be stored to the internal flip-flops on every low to high transition of the clock inputs.
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