CS89712 Просмотр технического описания (PDF) - Cirrus Logic

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CS89712

High-Performance, Low-Power System-on-Chip with 10BASE-T Ethernet Controller

Cirrus Logic 

CS89712

Table Of Contents

1. OVERVIEW ............................................................................................................................... 4

2. FUNCTIONAL DESCRIPTION ................................................................................................. 7

2.1 CPU Core ............................................................................................................................ 7

2.2 State Control ....................................................................................................................... 7

2.3 Power-Up Sequence ......................................................................................................... 10

2.4 Resets ............................................................................................................................... 10

2.5 Ethernet Port Reset and Initialization ................................................................................ 11

2.6 Ethernet EEPROM Configurations .................................................................................... 12

2.7 Clocks ............................................................................................................................... 16

2.8 Interrupt Controller ............................................................................................................ 17

2.9 Boot ROM ......................................................................................................................... 21

2.10 Memory Map ................................................................................................................... 21

2.11 Memory and I/O Expansion Interface .............................................................................. 23

2.12 SDRAM Controller ........................................................................................................... 23

2.13 SDRAM Initialization ....................................................................................................... 26

2.14 CL-PS6700 PC Card Interface ........................................................................................ 26

2.15 Endianness ..................................................................................................................... 29

2.16 Internal UARTs and SIR Encoder ................................................................................... 30

2.17 Synchronous Serial Interfaces ........................................................................................ 31

2.18 LCD Controller ................................................................................................................ 39

2.19 Timer Counters ............................................................................................................... 41

2.20 Real-Time Clock .............................................................................................................. 43

2.21 Dedicated LED Flasher ................................................................................................... 43

2.22 PWM Interfaces ............................................................................................................... 43

2.23 Ethernet Port Architecture ............................................................................................... 44

2.24 Ethernet Port Functional Description .............................................................................. 45

2.25 Programming the EEPROM ............................................................................................ 46

2.26 Ethernet LEDs ................................................................................................................. 48

2.27 Media Access Control Engine ......................................................................................... 48

2.28 Encoder/Decoder (ENDEC) ............................................................................................ 53

2.29 10BASE-T Transceiver ................................................................................................... 54

2.30 Basic Transmit Operation ................................................................................................ 56

2.31 Basic Receive Operation ................................................................................................. 56

2.32 Managing Interrupts & Status Queue .............................................................................. 57

2.33 Basic Receive Operation ................................................................................................. 57

2.34 Receive Frame Address Filtering .................................................................................... 63

2.35 Transmit Operation ......................................................................................................... 66

2.36 Full Duplex Considerations ............................................................................................. 69

2.37 Auto-Negotiation Considerations .................................................................................... 69

Contacting Cirrus Logic Support

For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:

http://www.cirrus.com/corporate/contacts/sales.cfm

Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product infor-

mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information

contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of

any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights

of third parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of

this publication may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or

otherwise) without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no

part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical,

photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture

or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing

in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade-

marks and service marks can be found at http://www.cirrus.com.

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DS502PP2

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