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VG36648041CT Просмотр технического описания (PDF) - Vanguard International Semiconductor

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VG36648041CT
VML
Vanguard International Semiconductor VML
VG36648041CT Datasheet PDF : 70 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
VIS
Preliminary
VG36648041CT
CMOS Synchronous Dynamic RAM
A. C Characteristics : (Ta = 0 to 70°C VDD = 3.3V 0.3V, VSS = 0V)
Parameter
CAS
Latency
symbol
VG36648041B
Unit
-7
-8
Min
Max
Min
Max
CLK cycle time
CLK to valid output delay
CLK high pulse width
CLK low pulse width
CKE setup time
CKE hold time
Address setup time
Address hold time
Command setup time
Command hold time
Data input setup time
Data input hold time
Output data hold time
CLK to output in low - Z
CLK to output in H - Z
3
tck3
2
tck2
3
tAc3
2
tAc2
tCH
tCL
tCKS
tCKH
tAS
tAH
tCMS
tCMH
tDS
tDH
tOH
tLZ
3
tHZ
2
7
8
ns
10
10
ns
6
6 ns
6
6 ns
3
3
ns
3
3
ns
2
2
ns
1
1
ns
2
2
ns
1
1
ns
2
2
ns
1
1
ns
2
2
ns
1
1
ns
3
3
ns
0
0
ns
5
6 ns
6
6
Row active to active delay
RAS to CAS delay
Row precharge time
ROW active time
ROW cycle time
Last data in to burst stop
Data - in to ACT(REF) command
tRRD
tRCD
tRP
tRAS
tRC
tBDL
tDAL
14
20
20
40
60
1
1+ tRP
120K
16
20
20
48
68
1
1+tRP
ns
ns
ns
120K ns
ns
CLK
CLK
Data - in to precharge
Transition time
Mode reg. set cycle
Power down exit setup time
Self refresh exit time
Refresh time
tDPL
tT
tRSC
tPDE
tSRX
tREF
1
1
10
2
2
1
64
1
CLK
1
10 ns
2
CLK
2
ns
1
CLK
64 ms
Document : 1G5-0153
Rev.1
Page 7

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