M65762FP Просмотр технического описания (PDF) - Renesas Electronics

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M65762FP

QM-Coder

Renesas Electronics 

M65762FP

Register Configuration

1. List of Registers

Table 1 List of Registers

Address

Register Name

0

System setting

1

Parameter setting

2

Command

2

Status

3

Interrupt enable setting

4, 5

Setting number of

pixels

6, 7

Setting number of lines

8, 9

Number of processing

lines

A

Load/store buffer

B

Operation mode setting

C

Marker code setting

C

Marker code reading

D

Scale-up/scale-down

setting

R/W

W/R

W/R

W

R

W/R

W/R

W/R

R

W/R

W/R

W

R

W/R

Content

• LSI H/W reset

• Selects bit width of code data bus (32 bits/16 bits/8 bits)

• Selects coding (image) data byte swap on code data bus

• Selects coding (image) data bit swap on code data bus

• Selects image data bit swap on image data bus

• Selects image data I/F (parallel I/F and serial I/F)

• Selects bit width of image data bus (32 bits/16 bits)

• Template selection (3-line template/2-line template)

• Sets up the AT pixel position (127 max)

(When set to 0, selects non-AT (default position))

• Context table RAM initializing processing command

• Start/stop command

(Coding/decoding, image data through, load/store of the line memory)

• Start/stop command of load/store of context table RAM

• Selects temporary stop/termination end mode

• Processing status (in process/end of process)

• Ready for reading/writing coding (image) data on code data bus

• Detects marker code (SDNORM, SDRST, ABORT, etc)

• Interrupt request status

• SC counter overflow error

• Processing mode (temporary stop/end of termination)

• Interrupt enable setting corresponding to each bit position of status

register

• Indicates pause/restart with marker code detected

(at time of decoding)

• Sets the number of pixels per line

(a maximum of 10240 pixels with 2-line template selected)

• Sets the number of lines to be coded/decoded

(1 line or more, a maximum of 65535 lines)

• Number of setting the coded/decoded lines

(a maximum of 65535 lines)

• Buffer register that loads/stores context table RAM data from the

MPU

(RAM address is automatically incremented each time data is

written/read.)

• Sets the operation mode

(Coding/decoding, image data through, and load/store of line

memory)

• Selects read-through of head coding data in decoding

(0 to 3 bytes)

• Selects the typical prediction function

• Selects prohibition of line memory initialization

• Sets the terminal marker code in encoding (SDNORM/SDRST)

• Reads a marker code in decoding

(SDNORM, SDRST, ABORT, others)

• Scale down in coding

(1/2 scale-down of horizontal and vertical, horizontal OR processing)

• Scale-up at time of decoding

(scale-up of horizontal and vertical by twice)

REJ03F0235-0200 Rev.2.00 Sep 14, 2007

Page 9 of 34

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