CS7654 Просмотр технического описания (PDF) - Cirrus Logic
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CS7654 Datasheet PDF : 62 Pages
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CS7654
CLKIN2X
t S2
CLKIN
Mosaic
Input Data
DI[9:0]
CLKOUT
Output Data
DOA[9:0]
DOB[9:0]
t H2
t S1 t H1
Input Timing Diagram
tPD
t OH
Output Timing Diagram
POWER CONSUMPTION (TA = 25 °C; VDD = 5 V; CL = no load; Input Levels: logic 0 = 0 V, logic 1 = VDD.)
Power Supply
Parameter
Symbol Min
Typ
Max Unit
Supply Voltage
VAA
4.75
5.0
5.25
V
Digital Supply Current (Encoder)
IAA1
-
70
mA
Analog Supply (Encoder)
Low-Z
(Note 1) IAA2
-
100
-
mA
Power Supply Rejection Ratio
PSRR
-
0.02
0.05 %/%
Normal Mode
Low Power Mode
Analog Outputs
IDD
-
150
200
mA
IDD
-
7
16
mA
Full Scale Output Current COMP_VID/Y/C
(Notes 2, 3) IO
32.9
34.7
36.5
mA
Full Scale Output Current COMP_VID/Y/C
(Notes 2, 4)
IO
8.22
8.68
9.13
mA
LSB Current COMP_VID/Y/C
LSB Current COMP_VID/Y/C
DAC-to DAC Matching
(Notes 2, 3)
(Notes 2, 4)
IB
IB
MAT
32.2
33.9
35.7
mA
8.04
8.48
8.92
mA
-
2
-
%
Output Compliance
Output Impedance
Output Capacitance
VOC
0
ROUT
-
COUT
-
-
+ 1.4
V
15
-
kΩ
-
30
pF
DAC Output Delay
ODEL
-
4
12
nsec
DAC Rise/Fall Time
(Note 5) TRF
-
2.5
5
nsec
Notes: 1. Low-Z - 3 dacs on
2. Output current levels with ISET = 4 KΩ , VREF = 1.232 V.
3. DACs are set to low impedance mode
4. DACs are set to high impedance mode
5. Times for black-to-white-level and white-to-black-level transitions.
5
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