MAX532 Просмотр технического описания (PDF) - Maxim Integrated

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MAX532

Dual, Serial-Input, Voltage-Output, 12-Bit MDAC

Maxim Integrated 

Dual, Serial-Input,

Voltage-Output, 12-Bit MDAC

5V

SCLK

1k

SK

DOUT

5V

1k

MISO

SS

DIN

MAX532 DOUT

CS

SO

SI

MICROWIRE

PORT

I/O

DIN

MAX532 SCLK

CS

MOSI

SCK

SPI

PORT

I/O

LDAC

I/O

THE DOUT-SI CONNECTION IS NOT REQUIRED FOR WRITING TO THE

MAX532, BUT MAY BE USED FOR READ-BACK PURPOSES.

LDAC

I/O

CPOL = 0, CPHA = 0

THE DOUT-MISO CONNECTION IS NOT REQUIRED FOR WRITING TO THE MAX532,

BUT MAY BE USED FOR READ-BACK PURPOSES.

Figure 4. Connections for Microwire

_______________Detailed Description

Digital Interface

The MAX532 is Microwire and SPI compatible (Figures

4 and 5). Both DACs are programmed by writing three

8-bit words (see Figures 2 and 3, and the Functional

Diagram). Serial data is clocked into the data registers

MSB first, with DACB information preceding DACA

information. Data is clocked in on the rising edge of

SCLK while CS is low. With CS high, data can not be

clocked into DIN, and DOUT is high impedance. SCLK

can be driven at rates up to 6.25MHz.

The MAX532 uses either a 3-wire or a 4-wire serial

interface. Three wires may be used (CS, DIN, SCLK)

by tying LDAC low. With LDAC low, the DACs are

updated simultaneously when CS goes high (see

Figure 2 and the Functional Diagram). The 3-wire inter-

face may be used if the MAX532 is used alone, or if two

or more MAX532s are cascaded (DOUT of one device

tied to DIN of the other) (Figure 6).

The 4-wire interface (LDAC, CS, DIN, SCLK) is required

if several serial devices are tied to the same data line,

and it is desirable to update them simultaneously

(Figure 7). With the 4-wire interface, the DACs are

updated when LDAC goes low (see Figure 3 and the

Functional Diagram).

A serial output, DOUT, allows cascading of two or more

MAX532s and allows read-back of the data written to

Figure 5. Connections for SPI

the device’s 24-bit shift register. The data at DOUT is

delayed 24 clock cycles from the data at DIN (see

Figures 2 and 3, and the Functional Diagram). DOUT

is an open-drain N-channel MOSFET that requires an

external pull-up resistor (typically 1kΩ if pulled up to

+5V, and 3kΩ if pulled up to +12V or +15V). Logic lev-

els are guaranteed with sink currents up to 5mA (see

Electrical Characteristics). Output data changes on the

falling edge of SCLK when CS is low. If CS is high,

DOUT is three-state (high-impedance).

Daisy-Chaining Devices

Any number of MAX532s can be daisy-chained by con-

necting the DOUT pin of one device (with a pull-up

resistor) to the DIN pin of the following device in the

chain (Figure 6).

When daisy-chaining devices, tCSS0 (CS low to SCLK

high), must be the greater of tDV + tDS or tDS + (tRC + tTR

- tCS), where tCSW is the CS pulse width used in the sys-

tem and the term (tRC + tTR - tCSW) accounts for the time

spent charging the DOUT capacitance with the external

pull-up resistor. So, for tRC < 250ns, tCSS0 is simply tDV

+ tDS. Calculate tRC using the following equation:

tRC = RP x C x ln (VPULL-UP/(VPULL-UP - 2.4V))

where VPULL-UP is the voltage that the pull-up resistor

is connected to, RP is the value of the pull-up resistor,

and C is the capacitance at DOUT. Values of tRC are

given in Table 1.

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