VND670SP(2003) Просмотр технического описания (PDF) - STMicroelectronics

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VND670SP
(Rev.:2003)

DUAL HIGH SIDE SWITCH WITH DUAL POWER MOS GATE DRIVER (BRIDGE CONFIGURATION)

STMicroelectronics 

VND670SP

ELECTRICAL CHARACTERISTICS (continued)

PWM

Symbol

Vpwl

Ipwl

Vpwh

Ipwh

Vpwhhyst

Vpwcl

Vpwtest

Ipwtest

Parameter

Test Conditions

PWM low level

voltage

PWM pin current

PWM high level

Vpw=1.5V

voltage

PWM pin current

PWM hysteresis voltage

Vpw=3.25V

PWM clamp voltage

Ipw = 1 mA

Ipw = -1 mA

Test mode PWM pin voltage

Test mode PWM pin current Vpwtest = -2.0 V

Min

1

3.25

0.5

VCC+0.3

-5.0

-3.5

-2000

LOGIC INPUT (INA/INB)

Symbol

Parameter

Test Conditions

Min

VIL

IINL

VIH

IINH

VIHYST

VICL

Input low level voltage

Input current

Input high level voltage

Input current

Input hysteresis voltage

Input clamp voltage

VIN=1.5 V

VIN=3.25 V

IIN=1mA

IIN=-1mA

1

3.25

0.5

6.0

-1.0

ENABLE (LOGIC I/O PIN)

Symbol

Parameter

Test Conditions

Min

Normal operation

VENL

Enable low level voltage

(DIAGX/ENX pin acts as an

input pin)

IENL

Enable pin current

VEN= 1.5 V

1

Normal operation

VENH

Enable high level voltage (DIAGX/ENX pin acts as an

3.25

input pin)

IENH

Enable pin current

VEN= 3.25 V

Normal operation

VEHYST

Enable hysteresis voltage (DIAGX/ENX pin acts as an

0.5

input pin)

VENCL

Enable clamp voltage

IEN=1mA

IEN=-1mA

6.0

-1.0

Fault operation

VDIAG

Enable output low level

voltage

(DIAGX/ENX pin acts as an

input pin)

IEN=1.6 mA

Typ

VCC+0.7

-3.5

-2.0

-500

Typ

6.8

-0.7

Typ

6.8

-0.7

Max

1.5

10

VCC+1.0

-2.0

-0.5

Max

1.5

10

8.0

-0.3

Max

1.5

10

8.0

-0.3

0.4

Unit

V

µA

V

µA

V

V

V

V

µA

Unit

V

µA

V

µA

V

V

V

Unit

V

µA

V

µA

V

V

V

V

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