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YMF781 Просмотр технического описания (PDF) - Yamaha Corporation

Номер в каталоге
Компоненты Описание
Список матч
YMF781
Yamaha
Yamaha Corporation Yamaha
YMF781 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
YMF781
Asynchronous Serial Interface UART
tem
Symbol in. yp. ax. nit
Transfer Frequency (Baud rate: fixed to x16) 1 / TRXD
9
RXD allowable frequency error (*1)
-2
144
kHz
+2
%
Conditions: TOP= -40 to 85, VDD= 3.0 to 3.6V, VDDC= 3.0 to 3.6V or 4.75 to 5.25V, Capacitor load=50pF
(*1) In the case of 10 bits including the start bit and the stop bit.
External Memory Interface
tem
Symbol in. yp. ax. nit
Data (D) Set-up time
TDS
10
ns
Data (D) Hold time
TDH
10
ns
Address (A) Output Delay time
TAD
40
ns
Control Signal Output Delay time (*1)
TCTLD
40
ns
Data (D) Output Delay time
TDD
80
ns
Data (D) Output turn-on time
TDT
20
ns
Conditions: TOP= -40 to 85, VDD= 3.0 to 3.6V, VDDC= 3.0 to 3.6V or 4.75 to 5.25V, Capacitor load=50pF
(*1) LBN/LWRN, UBN/UWRN, WRN, RDN, and CS*N
Internal Master Clock
MCK
A[21:0]
D[15:00]
(Output)
D[15:00]
(Input)
LWRN, UWRN,
WRN3clock or less
LWRN, UWRN,
WRN4clock or more
LBN, UBN,
CS*N, RDN
TAD
TDD
TDT
TCTLD
TCTLD
TCTLD
TAD
TDD
TDS
TDH
TCTLD
TCTLD
TCTLD
Access time 2 to 9 clocks (variable)
Note that the output timing of LWRN, UWRN, and WRN differs in the access time of 3 clocks or less and that of 4 clocks or more.
10

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