PSB4860 Просмотр технического описания (PDF) - Infineon Technologies

Номер в каталоге

Компоненты Описание

Список матч

PSB4860

ICs for Communications Sophisticated Answering Machine with Echo Cancellation SAM-EC

Infineon Technologies 

PSB 4860

1

Overview

GGeenneerraall

Combined with an analog front end the provides a solution for embedded or stand alone

answering machine applications. Together with a standard microcontroller for analog

telephones these two chips form the core of a featurephone with full duplex

speakerphone and answering machine capabilities.

The chip features recording by DigiTape™, a family of high performance algorithms.

Messages recorded with DigiTape™ can be played back with variable speed without

pitch alteration. Messages recorded with a higher bitrate can be converted into

messages with a lower bitrate arbitrarily. The PSB 4860 Version 4.1 supports three

members of DigiTape™: 10.3 kbit/s, 5.6 kbit/s and 3.3 kbit/s.

Furthermore the , Version 4.1 features a full duplex speakerphone, a caller ID decoder,

DTMF recognition and generation and call progress tone detection. A programmable

band-pass can be used to detect special tones besides the standard call progress tones.

The frequency response of cheap microphones or loudspeakers can be corrected by a

programmable equalizer.

Messages and user data can be stored in ARAM/DRAM or flash memory which can be

directly connected to the . The also supports a voice prompt EPROM for fixed

announcements.

The provides an IOM®-2 compatible interface with up to three channels for speech data.

Alternatively to the IOM®-2 compatible interface the supports a simple serial data

interface (SSDI) with separate strobe signals for each direction (linear PCM data, one

channel).

A separate interface is used for a glueless connection to the dual channel codec SAM-

AFE (PSB 4851).

The chip is programmed by a simple four wire serial control interface and can inform the

microcontroller of new events by an interrupt signal. For data retention the supports a

power down mode where only the real time clock and the memory refresh (in case of

ARAM/DRAM) are operational.

The supports interface pins to +5 V input levels.

Semiconductor Group

11

11.99

Share Link: