W742E816 Просмотр технического описания (PDF) - Winbond
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W742E816 Datasheet PDF : 58 Pages
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W742E/C816
Deleted: SA5505
Deleted: W742C811
4. Look-up Table
Bit 15-0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
(PC-4000H)*4 TA33 TA32 TA31 TA30 TA23 TA22 TA21 TA20 TA13 TA12 TA11 TA10 TA03 TA02 TA01 TA00
Look-up table address = (PC address - 4000H) *4
Example:
TABLE TAB_addr
; Real_TAB_addr (PC value) = TAB_addr/4 + 4000H
00h, 01h, 02h, 0Ah, 0Ch, 0Dh, 0Eh, 0Fh
ENDT
MOV TAB0, TAB_addr_B0_3 ; set Look-up table address
MOV TAB1, TAB_addr_B4_7
MOV TAB2, TAB_addr_B8_11
MOV TAB3, TAB_addr_B12_15
MOVC RAM
; get Look-up table value to RAM
5.4 Data Memory (RAM)
5.4.1 Architecture
The static data memory (RAM) used to store data is arranged up to 5120(5K) × 4 bits. The data RAM
is divided into 40 banks; each bank has 128 × 4 bits. Executing the MOV DBKRL, WR, MOV DBKRH,
WR or MOV DBKRL, #I, MOV DBKRH, #I instructions can determine which data bank is used. The
data memory can be accessed directly or indirectly and the data bank register has to be confirmed
firstly. In the indirect addressing mode, each data bank will be divided into eight pages. The RAM
page register has to be setting when in the indirect accessing RAM. The instructions MOV WRn,
@WRq MOV @WRq, WRn could Read or Write the whole memory in the indirect addressing mode.
The RAM address of @WRq indicates to (DBKRH)*800H + (DBKRL)*80H + (RAM page)*10H +
(WRq). The organization of the data memory is shown in Figure 5-2.
5120
address
0000H
:
007FH
0080H
:
00FFH
1380H
:
13FFH
4 bits
Data Bank 00
(or Working Registers Bank)
Data Bank 01
(or Working Registers Bank)
:
:
:
Bata Bank 39
5120 * 4 bits
00H
1st Data RAM Page
:
(or 1st WR Page)
0FH
10H
2nd Data RAM Page
:
(or 2nd WR Page)
1FH
20H
3rd Data RAM Page
:
(or 3rd WR Page)
2FH
:
:
8th Data RAM Page
(or 8th WR Page)
70H
:
7FH
Figure 5-2 Data Memory Organization
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Publication Release Date: April 15, 2005
Revision A2
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