MB88346L Просмотр технического описания (PDF) - Fujitsu
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MB88346L Datasheet PDF : 17 Pages
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MB88346L
■ DATA CONFIGURATION
The MB88346L has a 12-bit shift register for controlling the chip. The data passed to the 12-bit shift register
needs to be supplied in the following format.
The data structure consists of a total of 12 bits, four for address selection and eight for D/A data output.
1. Shift Register Control Data Configuration
Last
First
LSB
MSB
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11
D/A data output
Address selection
2. D/A Converter Control Signals
D0 D1 D2 D3 D4 D5 D6 D7
D/A data output
0
0
0
0
0
0
0
0
=: VSS
1
0
0
0
0
0
0
0
=: VLB + VSS
0
1
0
0
0
0
0
0
=: VLB × 2 + VSS
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
0
1
1
1
1
1
1
1
=: VLB × 254 + VSS
1
1
1
1
1
1
1
1
=: VDD
VLB = (VDD − VSS) /255
5
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