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MB88346L Просмотр технического описания (PDF) - Fujitsu

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MB88346L Datasheet PDF : 17 Pages
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MB88346L
PIN DESCRIPTION
Pin No.
Symbol
17
DI
14
DO
16
CLK
15
LD
18
AO1
19
AO2
2
AO3
3
AO4
4
AO5
5
AO6
6
AO7
7
AO8
8
AO9
9
AO10
12
AO11
13
AO12
11
VCC
20
GND
10
VDD
1
VSS
I/O
Function
Serial address/data input to the internal 12-bit shift register : The ad-
I
dress/data format is that upper 4 bits (D11 to D8) indicate an address
and lower 8 bits (D7 to D0) indicate data. The D11 (MSB) is the first-
in bit and D0 (LSB) is the last-in bit.
O
Outputs MSB bit data from 12-bit shift register.
Shift clock input to the internal 12-bit shift register : At the rising edge
I
of CLK data on the DI pin is shifted into the LSB of the shift register
and contents of the shift register are shifted right (to the MSB) .
Load strobe input for a 12-bit address/data : A high level on the LD pin
latches a 4-bit address (upper 4 bits : D11 to D8) of the internal 12-bit
I
shift register into the internal address decoder, and writes 8-bit data
(lower 8 bits : D7 to D0) of the shift register into an internal data latch
selected by the latched address.
O
8-bit D/A output pins with OP amps.
MCU interface and OP amp power supply pin.
MCU interface and OP amp ground pin.
D/A converter power supply pin.
D/A converter ground pin.
3

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