IDT72261L20PF Просмотр технического описания (PDF) - Integrated Device Technology

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IDT72261L20PF

CMOS SUPERSYNC FIFO™ 16,384 x 9, 32,768 x 9

Integrated Device Technology 

IDT72261/72271 SyncFIFO™

16,384 x 9, 32,768 x 9

WCLK

tDS

D0 - D8

WEN

D0

D1

first valid write

tENS

RCLK

(1)

tFWL1

tREF

EF

MILITARY AND COMMERCIAL TEMPERATURE RANGES

REN

Q0 - Q8

OE

tOLZ

tA

D0

tOE

NOTES:

1. tFWL1 max. (in ns) = 10* Tf + 2* TRCLK

Where Tf is either the RCLK or the WCLK period, whichever is shorter, and TRCLK is the RCLK period

2. LD = HIGH

Figure 8. First Data Word Latency (IDT Standard Mode)

tA

D1

3036 drw 11

18

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