IDT72132 Просмотр технического описания (PDF) - Integrated Device Technology

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IDT72132

CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 4096 x 9

Integrated Device Technology 

IDT72132, IDT72142

CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 AND 4096 x 9

COMMERCIAL TEMPERATURE RANGES

Depth Expansion (Daisy Chain) Mode

2. All other devices must have FL in the high state.

The IDT72132/42 can be easily adapted to applications 3. The Expansion Out (XO) pin and Expansion In (XI) pin

where the requirements are for greater than 2048/4096 words.

of each device must be tied together.

Figure 15 demonstrates Depth Expansion using three 4. External logic is needed to generate a composite Full

IDT72132/42. Any depth can be attained by adding additional

Flag (FF) and Empty Flag (EF). This requires the

IDT72132/42 operates in the Depth Expansion configuration

OR-ing of all EFs and OR-ing of all FFs (i.e., all must be

when the following conditions are met:

set to generate the correct composite (FF) or (EF).

1. The first device must be designated by grounding the 5. The Retransmit (RT) function and Half-Full Flag (HF)

First Load (FL) control input.

are not available in the Depth Expansion mode.

Q 0-7

VCC

SIX

Q 0-7

FL/RT

FIFO #1

IDT72142

R

R

SI SICP

XO XI

NW

D7

SICP

SI

VCC

SIX

FL/RT

FIFO #2

IDT72142

SI SICP

XI XO

Q 0-7

R

NW

D7

2752 drw 18

Figure 15. An 8K x 8 Serial-In Parallel-Out FIFO

TABLE 2: RESET AND FIRST LOAD TRUTH TABLE —

DEPTH EXPANSION/COMPOUND EXPANSION MODE

Inputs

Internal Status

Mode

RS

FL/RT

XI

Read Pointer

Write Pointer

EF

Reset-First

0

0

(1)

Location Zero

Location Zero

0

Device

Reset all

0

1

(1)

Location Zero

Location Zero

0

Other Devices

Read/Write

1

X

(1)

X

X

X

NOTES:

1. XI is connected to XO of the previous device.

2. RS = Reset Input, FL/RT = First Load/Retransmit, EF = Empty Flag Ouput, FF = Full Flag Output, XI = Expansion Input.

Outputs

FF

1

1

X

2752 tbl 10

5.36

12

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