TC58NVG1S3BFT00 Просмотр технического описания (PDF) - Toshiba

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TC58NVG1S3BFT00

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

Toshiba 

TC58NVG1S3BFT00/TC58NVG1S8BFT00

(11) When six address cycles are input

Although the device may read in a sixth address, it is ignored inside the chip.

Read operation

CLE

CE

WE

ALE

I/O

00h

RY / BY

Program operation

CLE

Address input

30h

Ignored

CE

WE

ALE

I/O

80h

Address input

Ignored

Data input

32

2003-10-30A

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