SMD5962-92324 Просмотр технического описания (PDF) - Unspecified
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SMD5962-92324 Datasheet PDF : 10 Pages
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STK11C68-M
WRITE CYCLES #1 & #2; G high
SYMBOLS
NO.
#1
#2
12 tAVAV
13 tWLWH
14 tELWH
15 tDVWH
16 tWHDX
17 tAVWH
18 tAVWL
19 tWHAX
tAVAV
tWLEH
tELEH
tDVEH
tEHDX
tAVEH
tAVEL
tEHAX
PARAMETER
Alt.
tWC Write Cycle Time
tWP Write Pulse Width
tCW Chip Enable to End of Write
tDW Data Set-up to End of Write
tDH Data Hold After End of Write
tAW Address Set-up to End of Write
tAS Address Set-up to Start of Write
tWR Address Hold After End of Write
(VCC = 5.0V ± 10%)
STK11C68-35M
MIN MAX
STK11C68-45M
MIN MAX
STK11C68-55M
MIN MAX
UNITS
35
45
55
ns
30
35
45
ns
30
35
45
ns
18
20
30
ns
0
0
0
ns
30
35
45
ns
0
0
0
ns
0
0
0
ns
WRITE CYCLES #1 & #2; G low
SYMBOLS
NO.
#1
#2
12 tAVAV
tAVAV
13 tWLWH
tWLEH
14 tELWH
tELEH
15 tDVWH
tDVEH
16 tWHDX
tEHDX
17 tAVWH
tAVEH
18 tAVWL
tAVEL
19 tWHAX
tEHAX
20 tWLQZi,m
21 tWHQX
Alt.
PARAMETER
tWC Write Cycle Time
tWP Write Pulse Width
tCW Chip Enable to End of Write
tDW Data Set-up to End of Write
tDH Data Hold After End of Write
tAW Address Set-up to End of Write
tAS Address Set-up to Start of Write
tWR Address Hold After End of Write
tWZ Write Enable to Output Disable
tOW Output Active After End of Write
(VCC = 5.0V ± 10%)
STK11C68-35M
MIN MAX
STK11C68-45M
MIN MAX
STK11C68-55M
MIN MAX
UNITS
45
45
55
ns
35
35
45
ns
35
35
45
ns
30
30
30
ns
0
0
0
ns
35
35
45
ns
0
0
0
ns
0
0
0
ns
35
35
35
ns
5
5
5
ns
Note i:
Note k:
Note m:
Measured + 200mV from steady state output voltage.
E or W must be ≥ VIH during address transitions.
If W is low when E goes low, the outputs remain in the high impedance state.
4-34
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