SC68C562 Просмотр технического описания (PDF) - Philips Electronics
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SC68C562 Datasheet PDF : 26 Pages
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Philips Semiconductors
CMOS Dual universal serial communications controller
(CDUSCC)
Product specification
SC68C562
BLOCK DIAGRAM
D0-D7
BUS
BUFFER
DTACKN
RWN
A1-A6
CSN
RESETN
RTxDRQAN/GPO1AN
RTxDRQBN/GPO1BN
TxDRQAN/GPO2AN
TxDRQBN/GPO2BN
RTxDAKAN/GPI1AN
RTxDAKBN/GPI1BN
TxDAKAN/GPI2AN
TxDAKBN/GPI2BN
DTCN
DONEN
TRxCA/B
RTxCA/B
RTSBN/SYNOUTBN
RTSAN/SYNOUTAN
CTSA/BN
DCDBN/SYNIBN
DCDAN/SYNIAN
A7 CONTROL
LOGIC
MPU
INTERFACE
DMA INTERFACE
SPECIAL
FUNCTION
PINS
INTERFACE/
OPERATION
CONTROL
ADDRESS
DECODE
R/W
DECODE
DMA
CONTROL
CCRA/B
PCRA/B
RSRA/B
TRSRA/B
ICTSRA/B
GSR
CMR1A/B
CMR2A/B
OMRA/B
TRCR A/B
FTLR A/B
TRMR A/B
CID
CONTROL
IRQN
IACKN
X1/CLK
X2/IDCN
INTERRRUPT
CONTROL
ICRA/B
IERA/B
IVR
IVRM
IER1
IER2
IER3
OSCILLATOR
DUSCC
LOGIC
CHANNEL MODE
AND TIMING A/B
DPLL CLK
MUX A/B
DPLL A/B
BRG
COUNTER/
TIMER A/B
C/T CLK
MUX A/B
CTCRA/B
CTPRHA/B
CTPRLA/B
CTHA/B
CTLA/B
TRANSMIT A/B
TRANS CLK
MUX
TPRA/B
TTRA/B
TX SHIFT
REG
TRANSMIT
16 DEEP
FIFO
TELRA/B
CRC
GEN
SPEC CHAR
GEN LOGIC
RECEIVER A/B
RCVR CLK
MUX
RPRA/B
RTRA/B
S1RA/B
S2RA/B
RCVR
SHIFT REG
RECEIVER
16 DEEP
FIFO
RFLRA/B
CRC
ACCUM
BISYNC
COMPARE
LOGIC
TxD A/B
RxD A/B
SD00253
1998 Sep 04
5
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