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SC1452

Dual 150mA LDO Regulator with Programmable Reset

Semtech Corporation 

SC1452

POWER MANAGEMENT

Applications Information (Cont.)

less than 150ms, CDLYB can be calculated using the For all practical purposes, equation (1) can be reduced

equation above, or read from the chart below.

to the following expression:

1000

100

tRSTB = 150ms max.

10

1

0.1

0.01

0.1

1

10

100

CDLYB (nF)

1000

Component Selection

Output capacitor - Semtech recommends a minimum

capacitance of 1µF at the output with an equivalent

series resistance (ESR) of < 1Ω over temperature. The

SC1452 has been designed to be used with ceramic

capacitors, but does not have to be used with ceramic

capacitors, allowing the designer a choice. Increasing the

bulk capacitance will further reduce output noise and

improve the overall transient response.

Input capacitor - Semtech recommends the use of a 1µF

ceramic capacitor at the input. This allows for the device

being some distance from any bulk capacitance on the

rail. Additionally, input droop due to load transients is

reduced, improving overall load transient response.

Bypass capacitor - Semtech recommends the use of a

10nF ceramic capacitor to bypass the bandgap

reference. Increasing this capacitor to 100nF will

further improve power supply rejection. CBYP may be

omitted if low noise operation is not required.

Thermal Considerations

The worst-case power dissipation for this part is given

by:

( ) PD(MAX ) =

V − V IN(MAX )

OUTA (MIN )

• IOUTA (MAX )

( ) +

V − V IN(MAX )

OUTB (MIN )

• IOUTB (MAX )

(1)

+ VIN(MAX ) • IQ(MAX )

( ) PD(MAX ) =

V − V IN(MAX )

OUTA (MIN )

• IOUTA (MAX )

( ) +

V − V IN(MAX )

OUTB (MIN )

• IOUTB (MAX )

(2)

Looking at a typical application:

V = 4.2V

IN(MAX)

VOUTA = 3V - 2% (worst case) = 2.94V

VOUTB = 3.3V - 2% (worst case) = 3.234V

IOUTA = IOUTB = 150mA

T = 85°C

A

Inserting these values into equation (2) above gives us:

PD(MAX ) = (4.2 − 2.94)• 0.15 + (4.2 − 3.234)• 0.15

= 0.189 + 0.145

= 0.334W

Using this figure, we can calculate the maximum thermal

impedance

allowable

to

maintain

T

J

≤

125°C:

( ) θJA(MAX ) =

TJ(MAX ) − TA(MAX )

PD(MAX )

=

(125 − 85)

0.334

= 120°C / W

With the standard MSOP-10 Land Pattern shown at the

end of this datasheet, and minimum trace widths, the

thermal impedance junction to ambient for SC1452 is

113°C/W. Thus no additional heatsinking is required for

the above conditions. The junction temperature can be

further reduced by using larger trace widths and

connecting pcb copper area to the GND pin (pin 3), which

connects directly to the device substrate. Lower junction

temperatures improve overall output voltage accuracy.

Layout Considerations

While layout for linear devices is generally not as critical

as for a switching application, careful attention to detail

will ensure reliable operation.

1) Attaching the part to a larger copper footprint will

enable better heat transfer from the device, especially

on PCBs where there are internal ground and power

planes.

2) Place the input, output and bypass capacitors close

to the device for optimal transient response and device

behaviour.

 2006 Semtech Corp.

8

www.semtech.com

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