SAA7185B Просмотр технического описания (PDF) - Philips Electronics
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SAA7185B Datasheet PDF : 36 Pages
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Philips Semiconductors
Digital Video Encoders (DENC2-M6)
Preliminary specification
SAA7184; SAA7185B
PINNING
SYMBOL
VSSD1
DP4 to DP7
PIN
1
2 to 5
RCV1
6
RCV2
7
VSSD2
VP0 to VP7
8
9 to 16
VDDD1
17
SEL_ED
18
VSSD3
MP7 to MP0
VSSD4
RCM1
RCM2
19
20 to 27
28
29
30
KEY
OVL0 to OVL2
VSSD5
CDIR
31
32 to 34
35
36
VDDD2
37
LLC
38
CREF
39
XTALO
40
XTALI
41
VSSD6
42
RTCI
43
AP
44
SP
45
VrefL
46
VrefH
47
VDDA1
48
I/O
DESCRIPTION
−
digital ground 1
I/O Upper 4 bits of the data port; if pin 68 (SEL_MPU) is HIGH, the data bus of
the parallel MPU interface is used. If pin 68 is LOW, then the UV lines of the
video port are used.
I/O Raster control 1 for video port; depending on the synchronization mode, this
pin receives or provides a VS/FS/FSEQ signal.
I/O Raster control 2 for video port; depending on the synchronization mode, this
pin receives or provides an HS/HREF/CBL signal.
−
digital ground 2
I
Video port; this is an input for CCIR 656 compatible multiplexed video data. If
the 16-bit DIG-TV2 format is used, then Y data is input.
I
digital supply voltage 1
I
select encoder data; selects input data either from the MPEG port or from
the video port
−
digital ground 3
I
MPEG port; it is an input for CCIR 656 style multiplexed YUV data.
−
digital ground 4
O Raster control 1 for MPEG port; this pin provides a VS/FS/FSEQ signal.
O Raster control 2 for MPEG port; this pin provides an HS pulse for the MPEG
decoder.
I
key signal for OVL (active HIGH)
I
on-screen display data; this is the index for the internal OVL look-up tables
−
digital ground 5
I
Clock direction; if the CDIR input is HIGH, the circuit receives a clock signal,
if not LLC and CREF are generated by the internal crystal oscillator.
I
digital supply voltage 2
I/O Line-locked clock; this is the 27 MHz master clock for the encoder. The
direction is set by the CDIR pin.
I/O Clock reference signal; this is the clock qualifier for DIG-TV2 compatible
signals. The polarity is programmable by software.
O crystal oscillator output (to crystal)
I
Crystal oscillator input (from crystal). If the oscillator is not used, this pin
should be connected to ground.
−
digital ground 6
I
Real time control Input; if the clock is provided by the SAA7151B or
SAA7111, RTCI should be connected to the RTCO pin of the decoder to
improve the signal quality.
−
test pin (should be connected to digital ground for normal operation)
−
test pin (should be connected to digital ground for normal operation)
I
lower reference voltage input for the DACs
I
upper reference voltage input for the DACs
I
analog positive supply voltage 1 for the DACs and output amplifiers
1996 Jul 03
4
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