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SAA4956TJ

2.9-Mbit field memory with noise reduction

Philips Electronics 

Philips Semiconductors

2.9-Mbit field memory with noise reduction

Preliminary specification

SAA4956TJ

1 FEATURES

• 2949264-bit field memory with optional field based

noise reduction

• 245772 × 12-bit organization

• 3.3 V power supply

• Inputs fully TTL compatible when using an extra 5 V

power supply

• High speed read and write operations

• FIFO operations:

– Full word continuous read and write

– Independent read and write pointers (asynchronous

read and write access)

– Resettable read and write pointers.

• Optional field based noise reduction activated by an

enable pin and controlled via the I2C-bus

• Optional random access by block function (40 words per

block) enabled during pointer reset operation

• Quasi static (internal self-refresh and clocking pauses of

infinite length)

• Write mask function

• Cascade operation possible

• Compatible with SAA4955TJ

• 16-Mbit CMOS DRAM process technology

• 40-pin SOJ package.

2 GENERAL DESCRIPTION

The SAA4956TJ is a 2949264-bit field memory with an

optional field based noise reduction designed for

advanced TV applications such as 100/120 Hz TV,

PALplus, PIP and 3D comb filter. The SAA4956TJ is

functional and pin compatible with the SAA4955TJ.

However, the SAA4956TJ has also, in addition to the field

memory function, a field based noise reduction circuit. If

this function is enabled it can be controlled via the I2C-bus.

The maximum storage depth is 245772 words × 12 bits.

A FIFO operation with full word continuous read and write

could be used as a data delay, for example. A FIFO

operation with asynchronous read and write could be used

as a data rate multiplier. Here the data is written once, then

read as many times as required as long as new data is not

written. In addition to the FIFO operations, a random block

access mode is accessible during the pointer reset

operation. When this mode is enabled, reading and/or

writing may begin at, or proceed from, the start address of

any of the 6144 blocks. Each block is 40 words in length.

Two or more SAA4956TJs can be cascaded to provide a

greater storage depth or a longer delay, without the need

for additional circuitry.

The SAA4956TJ contains separate 12-bit wide serial ports

for reading and writing. The ports are controlled and

clocked separately, so asynchronous read and write

operations are supported. Independent read and write

clock rates are possible. Addressing is controlled by read

and write address pointers. Before a controlled write

operation can begin, the write pointer must be set to zero

or to the beginning of a valid address block. Likewise, the

read pointer must be set to zero or to the beginning of a

valid address block before a controlled read operation can

begin.

3 ORDERING INFORMATION

TYPE

NUMBER

SAA4956TJ

NAME

SOJ40

PACKAGE

DESCRIPTION

plastic small outline package; 40 leads (J-bent); body width 10.16 mm

VERSION

SOT449-1

1998 Dec 08

3

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