RT9212 Просмотр технического описания (PDF) - Richtek Technology
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RT9212 Datasheet PDF : 14 Pages
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RT9212
Preliminary
PGOOD (Pin 19)
PGOOD is an open-drain output used to indicate that both
the channel 1 and channel 2 regulators are within normal
operating voltage ranges.
OCSET2/SD (Pin 20), OCSET1/SD (Pin 21)
Connect a resistor (ROCSET) from this pin to the drain of
the upper MOSFET of the supply voltage sets the over-
current trip point. ROCSET, an internal 40μA current source
, and the upper MOSFET on-resistance, (RDS(ON), set the
converter over-current trip point (IOCSET) according to the
following equation:
40uA × ROCSET
IOCSET =
R DS(ON) of the upper MOSFET
An over-current trip cycles the soft-start function. Pulling
the pin to ground resets the device and all external
MOSFETs are turned off allowing the two output voltage
power rails to float.
Function Block Diagram
PVCC1 (Pin 22)
Connect this pin to a well-decoupled 5V supply. It is also
the positive supply for the lower gate driver, LGATE1.
LGATE1 (Pin 23)
Channel 1 power gate drive output. Connect to gate of the
low-side power N-Channel MOSFET. This pin is monitored
by the adaptive shoot-through protection circuitry to
determine when the lower MOSFET has turned off.
PGND1 (Pin 24)
Return pin for high currents flowing in low-side power
N-MOSFET. Ties the pin directly to the low-side MOSFET
source and ground plane with the lowest impedance.
VCC
FB1
PGOOD
COMP1
FB2
FBL
DRV
0.8V
Ref.
0.8V
137.5%
62.5%
OVP OV
&
UVP UV
Power
Good
++
EA
-
Power
on
Reset
Bias
Thermal
SHDN
POR
OC
40uA
Soft-
Start
1
PWM1
+
-
OC
OV
UV
Thermal
SHDN
Control
Logic
300kHz
Oscillator
Zf
Linear
Regulator
+
+
EA
-
FB2
Zc
- PWM2
+
OC
180 deg OV
shift UV
Thermal
SHDN
Control
Logic
VCC
OV
UV
POR
Soft-
Start
2
+
OC -
40uA
OCSET1/SD
BOOT1
UGATE1
PHASE1
PVCC1
LGATE1
PGND1
PGND2
LGATE2
PHASE2
UGATE2
BOOT2
OCSET2/SD
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4
GNDA
DS9212-05 March 2007
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