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RT9212

Dual 5V Synchronous Buck PWM DC-DC and Linear Power Controller

Richtek Technology 

Preliminary

RT9212

Output Capacitor

The output capacitor is required to maintain the DC output

voltage and supply the load transient current. The capacitor

must be selected and placed carefully to yield optimal

results and should be chosen to provide acceptable ripple

on the output voltage.

The key specification for output capacitor is its ESR. Low

ESR capacitors are preferred to keep the output voltage

ripple low. The bulk capacitor's ESR will determine the

output ripple voltage and the initial voltage drop after a

high slew-rate transient. For transient response, a

combination of low value, high frequency and bulk capacitors

placed close to the load will be required. High frequency

decoupling capacitors should be placed as close to the

power pins of the load as possible. In most cases, multiple

electrolytic capacitors of small case size perform better

than a single large case capacitor.

The capacitor value must be high enough to absorb the

inductor's ripple current. The output ripple is calculated as

:

ΔVOUT = ΔIOUT × ESR

Another concern is high ESR induced output voltage ripple

may trigger UV or OV protections will cause IC shutdown.

MOSFET

The MOSFET should be selected to meet power transfer

requirements is based on maximum drain-source voltage

(VDS), gate-source drive voltage (VGS), maximum output

current, minimum on-resistance (RDS(ON)) and thermal

management.

In high-current applications, the MOSFET power

dissipation, package selection and heatsink are the

dominant design factors. The losses can be divided into

conduction and switching losses.

Conduction losses are related to the on resistance of

MOSFET, and increase with the load current. Switching

losses occur on each ON/OFF transition. The conduction

losses are the largest component of power dissipation for

both the upper and the lower MOSFETs.

For the Buck converter the average inductor current is equal

to the output load current. The conduction loss is defined

as :

PCD (high side switch) = IO2 * RDS(ON) * D

PCD (low side switch) = IO2 * RDS(ON) * (1-D)

The switching loss is more difficult to calculate. The reason

is the effect of the parasitic components and switching

times during the switching procedures such as turn-on /

turn-off delays and rise and fall times. With a linear

approximation, the switching loss can be expressed as :

PSW = 0.5 * VDS(OFF) * IO * (TRise + TFall) * F

Where

VDS(OFF) is drain to source voltage at off time,

TRise is rise time,

TFall is fall time,

F is switching frequency.

The total power dissipation in the switching MOSFET can

be calculate as :

PHigh Side Switch =

IO2 * RDS(ON)* D + 0.5 * VDS(OFF)* IO* (TRise + TFall)* F

PLow Side Switch = IO2 * RDS(ON) * (1-D)

For input voltages of 3.3V and 5V, conduction losses often

dominate switching losses. Therefore, lowering the RDS(ON)

of the MOSFETs always improves efficiency.

Feedback Compensation

The RT9212 is a voltage mode controller; the control loop

is a single voltage feedback path including an error amplifier

and PWM comparator as Figure 1 shows. In order to achieve

fast transient response and accurate output regulation, a

adequate compensator design is necessary. The goal of

the compensation network is to provide adequate phase

margin (greater than 45 degrees) and the highest 0dB

crossing frequency. And to manipulate loop frequency

response that its gain crosses over 0dB at a slope of -

20dB/dec.

DS9212-05 March 2007

www.richtek.com

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