Philips Semiconductors
Universal codec
Preliminary specification
PCD5096
8.3 Control registers organization
8.3.1 CONTROL REGISTER ASSIGNMENT
The control register address assignment in the PCD5096 is shown in Table 3.
Table 3 Control register map
REGISTER
Control Register 0
Control Register 1
Control Register 2
Control Register 3
Control Register 4
Control Register 5
Control Register 6
REGISTER SIZE ADDRESS RESET STATE
MNEMONIC (BITS) (HEX)
(HEX)
FUNCTION
CR0
16
78
0000
control signals for codecs, codec test
modes, Power-down control and disable
phase correction
CR1
3
79
00
IOM control
CR2
16
7A
0000
gain setting of analog-to-digital (A/D) and
digital-to-analog (D/A) paths
CR3
16
7B
A0A0
reference voltage setting of Codec 1 and
Codec 2
CR4
16
7C
0000
selection of the DSP modes
CR5
2
7D
02
control of I/O pin IO0
CR6
2
7E
02
control of I/O pin IO1
1997 Jan 22
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