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MT88E45B

4-Wire Calling Number Identification Circuit 2 (4-Wire CNIC2)

Zarlink Semiconductor Inc 

MT88E45B

Data Sheet

MT88E45B

Vdd

Both Tones Present

P Q1

+

-

Comparator

VTGt

N Q2

= Vss

ST/GT

R1

C

Vdiode

R2

Rp=R1 || R2

EST

CAS

EST

ST/GT

tDP

tGP

tREC

tDA

tABS

tGA

DR/STD

Indicates STD in CAS

detection mode

tGP=R1C ln [Vdd / (Vdd-VTGt)]

tGA=RpC ln Vdd - Vdiode (Rp/R2)

VTGt - Vdiode (Rp/R2)

Rp=R1 || R2

tGA=0 if R2=0

STD

Figure 5 - CAS Guard Time Circuit Operation

Tone present guard time (tGP) operation: In Figure 5

initially there is no CAS, EST is low so Q1 is off. C

has been fully charged applying 0V to ST/GT so Q2

is on. When both tones are detected EST goes high

and turns off Q2. Because C has been fully charged

(ST/GT=0V), the comparator output is low and Q1

stays off. With both Q1 and Q2 off the high at EST

discharges C through R1 and the ST/GT voltage

increases from 0V. When the voltage exceeds the

comparator threshold VTGt, which is typically 0.5

Vdd, the comparator output goes high; Q1 turns on

and accelerates the discharge of C (ST/GT goes

quickly to Vdd); STD goes low to indicate that a valid

CAS has been received. If one or both tones

disappeared before tGP has been reached (i.e. when

ST/GT voltage is still below VTGt), Q2 turns back on

and charges C quickly to bring the ST/GT voltage

back to 0V. Then if EST goes high again the tGP

duration must start over.

Tone absent guard time (tGA) operation: In Figure 5

initially both tones have been detected for tGP so C is

fully discharged and ST/GT is at Vdd. While both

tones continue to be detected EST stays high; ST/GT

is at Vdd (the comparator output is high); so Q1 is on

and Q2 is off. When one or both tones stop EST

goes low and turns off Q1. Because C is fully

discharged (ST/GT=Vdd), the comparator output is

high and Q2 stays off. With both Q1 and Q2 off the

low at EST charges C through Rp=(R1 || R2) and the

ST/GT voltage falls towards 0V. When the voltage

has fallen below VTGt, the comparator output goes

low. Since EST is also low Q2 turns on and

accelerates the charging of C so that ST/GT goes

quickly to 0V. STD goes high to indicate that the CAS

has ended. If EST goes back to high before tGA has

been reached (i.e. when ST/GT voltage is still above

VTGt), Q1 turns back on and discharges C quickly to

bring the ST/GT voltage back to Vdd. Then if EST

goes low again the tGA duration must start over. To

set tGA=0, set R2 to 0.

In Figure 5, tDP is the delay from the start of CAS to

EST responding, tDA is the delay from the end of CAS

to EST responding. The total delay from the start of

CAS to STD responding is tREC=tDP+tGP. The total

delay from the end of CAS to STD responding is

tABS=tDA+tGA.

8

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