STOP CLOCK WITH DESELECT OPERATION TIMING
K
ADSC
SE1
DATA IN
VIH OR VIL FIXED (SEE NOTE 1)
DQx
DATA
DATA
HIGH–Z
CONTINUE
BURST READ
CLOCK STOP
(DESELECTED)
WAKE UP
(DESELECTED)
NOTES:
1. While the clock is stopped, DATA IN must be fixed in a high (VIH) or low (VIL) state to reduce the DC current of the
input buffers. For lowest power operation, all data and address lines should be held in a low (VIL) state and control
lines held in an inactive state.
2. For best possible power savings, the data–in should be driven low.
MCM69P819
16
MOTOROLA FAST SRAM