M38C88EA-XXXFP Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC

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M38C88EA-XXXFP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI ELECTRIC  

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MITSUBISHI MICROCOMPUTERS

38C8 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

(2) Asynchronous Serial I/O (UART) Mode

Clock asynchronous serial I/O mode (UART) can be selected by clear-

ing the serial I/O mode selection bit of the serial I/O control register

to “0”.

Eight serial data transfer formats can be selected, and the transfer

formats used by a transmitter and receiver must be identical.

The transmit and receive shift registers each have a buffer register,

but the two buffers have the same address in memory. Since the shift

register cannot be written to or read from directly, transmit data is

written to the transmit buffer, and receive data is read from the re-

ceive buffer.

The transmit buffer can also hold the next data to be transmitted, and

the receive buffer register can hold a character while the next char-

acter is being received.

P44/RXD

P46/SCLK

f(XIN)

P45/TXD

Data bus

Address 001816

Serial I/O control register Address 001A16

OE

Receive buffer register

Character length selection bit

STdetector 7 bits

Receive shift register

8 bits

Receive buffer full flag (RBF)

Receive interrupt request (RI)

1/16

PE FE SP detector

Clock control circuit

UART control register

Address 001B16

Serial I/O clock selection bit

BRG count source selection bit

1/4

Frequency division ratio 1/(n+1)

Baud rate generator

Address 001C16

ST/SP/PA generator

Character length selection bit

1/16

Transmit shift register

Transmit shift register shift completion flag (TSC)

Transmit interrupt source selection bit

Transmit interrupt request (TI)

Transmit buffer register

Address 001816

Transmit buffer empty flag (TBE)

Serial I/O status register Address 001916

Data bus

Fig. 22 Block diagram of UART serial I/O

Transmit or receive clock

Transmit buffer write signal

Serial output TXD

TBE=0

TSC=0

TBE=1

ST

Receive buffer read signal

TBE=0

D0

D1

1 start bit

7 or 8 data bits

1 or 0 parity bit

1 or 2 stop bit (s)

Serial input RXD

ST

D0

D1

TBE=1

SP

ST D0

TSC=1✽

D1

SP

✽Generated at 2nd bit in 2-stop-bit mode

RBF=1

RBF=0

SP ST

D0

D1

RBF=1

SP

Notes 1: Error flag detection occurs at the same time that the RBF flag becomes “1” (at 1st stop bit, during reception).

2: The transmit interrupt (TI) can be selected to occur when either the TBE or TSC flag becomes “1” by the setting of the transmit interrupt source

selection bit (TIC) of the serial I/O control register.

3: The receive interrupt (RI) is set when the RBF flag becomes “1”.

4: After data is written to the transmit buffer register when TSC=1, 0.5 to 1.5 cycles of the data shift cycle is necessary until changing to TSC=0.

Fig. 23 Operation of UART serial I/O function

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