LX8415-00(2005) Просмотр технического описания (PDF) - Microsemi Corporation

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LX8415-00
(Rev.:2005)

0.5 A LOW DROPOUT POSITIVE REGULATORS

Microsemi Corporation 

LX8415-xx

PRODUCT DATABOOK 1996/1997

0.5A LOW DROPOUT POSITIVE REGULATORS

PR E L I M I N A RY D ATA S H E E T

A B S O L U T E M A X I M U M R AT I N G S (Note 1)

PACKAGE PIN OUTS

Power Dissipation .................................................................................. Internally Limited

Input Voltage

TAB IS VOUT

LX8415-00 (Adjustable) / 8415-33 (3.3V) .................................................................. 7V

3. IN

Surge Voltage ................................................................................................................. 7V

Operating Junction Temperature

Plastic (ST, DD & DT Packages) .......................................................................... 150°C

Storage Temperature Range ...................................................................... -65°C to 150°C

Lead Temperature (Soldering, 10 seconds) ............................................................. 300°C

Short-Circuit Protection ....................................................................................... Indefinite

RoHS Peak Package Solder Reflow Temp. (40 seconds max. exposure)............................. 260°C (+0, -5)

Note 1. Exceeding these ratings could cause damage to the device. All voltages are with

respect to Ground. Currents are positive into, negative out of the specified terminal.

e THERMAL DATA

t ST PACKAGE:

THERMAL RESISTANCE-JUNCTION TO TAB, θJT

THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA

15°C/W

*150°C/W

Junction Temperature Calculation: T = T + (P x θ ). The θ numbers are guidelines for the

J

A

D

JA

JA

le thermal performance of the device/pc-board system. All of the above assume no ambient airflow.

* θJAcan be improved with package soldered to 0.5IN2 copper area over backside ground

plane or internal power plane. θJAcan vary from 20ºC/W to > 40ºC/W depending on

mounting technique. (See Application Notes Section: Thermal Considerations)

2. OUT

1. ADJ / GND

ST PACKAGE

(Top View)

RoHS / Pb-free 100% Matte Tin Lead Finish

BLOCK DIAGRAM

o VIN

Bias

s Circuit

Thermal

ObLimit Circuit

Bandgap

Circuit

Control

Circuit

Output

Circuit

VOUT

ADJ

Current

Limit Circuit

2

Copyright © 1999

Rev. 0.5

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