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LTC1098LAC Просмотр технического описания (PDF) - Linear Technology

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LTC1098LAC Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
LTC1096L/LTC1098L
TEST CIRCUITS
LTC1096L
CS
CLK
DOUT
LTC1098L
CS
Voltage Waveforms for ten
tWAKEUP
1
VOL
ten
B7
LTC1096/98 • TC06
DIN
START
CLK
DOUT
1
2
3
4
5
VOL
ten
B7
LTC1096/98 • TC07
APPLICATI S I FOR ATIO
INPUT DATA WORD
The LTC1096L requires no DIN word. It is permanently
configured to have a single differential input. The conver-
sion result, in which the output on the DOUT line is
presented in MSB-first sequence followed by LSB se-
quence, provides easy interface to MSB- or LSB-first
serial ports.
The LTC1098L latches data into the DIN input on the rising
edge of the clock. The input data words are defined as
follows:
START
SGL/
DIFF
ODD/
SIGN
MSBF
MUX MSB-FIRST/
ADDRESS LSB-FIRST
LTC1096/9 • AI01
Start Bit
The first “logical one” clocked into the DIN input after CS
goes low is the start bit. The start bit initiates the data
transfer. The LTC1098L will ignore all leading zeroes
which precede this logical one. After the start bit is
received, the remaining bits of the input word will be
clocked in. Further inputs on the DIN pin are then ignored
until the next CS cycle.
Multiplexer (MUX) Address
The bits of the input word following the START bit assign
the MUX configuration for the requested conversion. For
a given channel selection, the converter will measure the
voltage between the two channels indicated by the “+” and
“–” signs in the selected row of the following tables. In
6

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