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LT3645

36V 500mA Step-Down Regulator and 200mA LDO

Linear Technology 

LT3645

OPERATION

The LT3645 includes a constant frequency, current mode

step-down buck switching regulator together with a low-

dropout regulator (LDO).

If EN/UVLO is less than ~0.7V, both the buck and LDO

are off, the output is disconnected and the input current

is less than 2μA. The buck turns on when EN/UVLO is

greater than 1.23V. An undervoltage lockout (UVLO)

turns the buck and LDO off when VIN is less than 3.4V.

An overvoltage lockout (OVLO) turns the buck and LDO

off when VIN is greater than 38.5V. The part will withstand

nonrepetitive one second input voltage transients up to

55V. An internal thermal shutdown circuit monitors the die

temperature and shuts both the buck and LDO off if the

die temperature exceeds ~160°C. The thermal shutdown

has 10 degrees of hysteresis.

An internal regulator provides power to the control circuitry

and produces the 0.8V feedback voltage for the buck and

LDO error amplifiers.

An internal, fixed-frequency oscillator in the step-down

regulator enables an RS flip-flop, turning on the internal

power switch Q1. A comparator monitors the current

flowing between the VIN and SW pins, turning the switch

off when this current reaches a level determined by the

voltage at VC and the internal slope-compensation. An error

amplifier servos the VC node. The output of an external

resistor divider between OUT and ground is tied to the

VFB pin and presented to the negative error amp input.

The positive input to the error amp is a 0.8V reference, so

the voltage loop forces the VFB pin to 0.8V. The reference

voltage of the buck error amplifier is ramped over 900μs

during the soft-start period. When VC rises, it results in an

increase in output current, and when VC falls, it results in

less output current. Current limit is provided by an active

clamp on the VC node.

The buck power switch (Q1) is driven from the BOOST

pin. An external capacitor and internal diode are used to

generate a voltage at the BOOST pin that is higher than the

input supply, which allows the driver to fully saturate the

internal bipolar NPN power switch for efficient operation.

An external diode can be used to make the BOOST drive

more effective at low output voltages.

The oscillator reduces the LT3645’s operating frequency

during the soft-start period. This frequency foldback helps

to control the output current during startup.

The current in the external catch diode (D1) is sensed

through the DA pin. If the catch diode current exceeds

0.9A, the oscillator frequency is decreased. This prevents

current runaway during startup or overload.

The LDO only operates if EN/UVLO is greater than 1.23V

and EN2 is greater than 1.3V. If EN/UVLO is low and EN2

is high, the LDO will not start. When EN2 > 1.3V and EN/

UVLO > 1.23V, the LDO power transistor will turn on and

regulate the output at the OUT2 pin. An error amplifier

driving Q2 has its positive input at the 0.797V reference.

The output of an external resistor divider between OUT2

and ground is tied to the VFB2 pin and presented to the

negative error amp input, forcing the VFB2 pin to 0.797V.

The reference voltage of the LDO error amplifier is ramped

over 600μs during the soft-start period. The LDO power

transistor (Q2) is driven from the VIN pin. Q2 is a bipolar

NPN which draws its collector current from the VCC2 pin.

The NPG pin is an open-collector output that indicates

when both buck and LDO outputs are in at least 90% in

regulation. When FB and FB2 rise above 720mV, the NPG

pin is pulled low.

3645f

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