LH28F040SUT-Z4 Просмотр технического описания (PDF) - Sharp Electronics
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LH28F040SUT-Z4 Datasheet PDF : 32 Pages
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4M (512K × 8) Flash Memory
LH28F040SUTD-Z4
The LH28F040SUTD-Z4 incorporates an Automatic
Power Saving (APS) feature which substantially reduces
the active current when the device is in static mode of
operation (addresses not switching).
In APS mode, the typical ICC current is 2 mA at 3.3 V.
A bank reset mode of operation is enabled when
whole BE »0 (or BE »1), WE » and OE » hold low more than 5
µs. In this mode, all operations are aborted, the internal
control circuit is reset and CSR register is cleared. When
the device power up, this bank reset operation must be
executed for each bank to initialize the control circuit. If
BE »X (either BE »0 or BE »1 which is in low state) and or
WE » and or OE » and or goes high, chip reset mode will
be finished. It needs more than 750 ns from one of the
BE »X, WE » or OE » goes high until output data are valid. It
is impossible to reset the whole chip at once, the bank
reset must be executed separately for bank0 and bank1.
A CMOS Standby mode of operation is enabled when
BEX» transitions high with all input control pins at CMOS
levels. In this mode, the device draws an ICC standby
current of 20 µA.
Please do not execute reprogramming 0 for the bit
which has already been programmed 0. Overwrite op-
eration may generate unerasable bit. In case of repro-
gramming 0 to the data which has been programmed 1.
• Program 0 for the bit in which you want to change
data from 1 to 0.
• Program 1 for the bit which has already been pro-
grammed 0.
For example, changing data from 10111101 to
10111100 requires 11111110 programming.
MEMORY MAP
Bank0 (BE0 = Low)
3FFFFH
3C000H
3BFFFH
38000H
37FFFH
34000H
33FFFH
30000H
2FFFFH
2C000H
2BFFFH
28000H
27FFFH
24000H
23FFFH
20000H
1FFFFH
1C000H
1BFFFH
18000H
17FFFH
14000H
13FFFH
10000H
0FFFFH
0C000H
0BFFFH
08000H
07FFFH
04000H
03FFFH
00000H
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
Bank1 (BE1 = Low)
3FFFFH
15
16KB BLOCK
3C000H
14
3BFFFH
16KB BLOCK
38000H
13
37FFFH
34000H
16KB BLOCK
33FFFH
12
30000H
16KB BLOCK
2FFFFH
11
2C000H
16KB BLOCK
2BFFFH
10
28000H
16KB BLOCK
9
27FFFH
24000H
16KB BLOCK
23FFFH
8
20000H
16KB BLOCK
1FFFFH
7
1C000H
16KB BLOCK
1BFFFH
6
18000H
16KB BLOCK
5
17FFFH
14000H
16KB BLOCK
13FFFH
4
10000H
16KB BLOCK
0FFFFH
3
0C000H
16KB BLOCK
2
0BFFFH
16KB BLOCK
08000H
07FFFH
1
04000H
16KB BLOCK
03FFFH
0
16KB BLOCK
00000H
Figure 3. Memory Map
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
28F040SUZ4-3
5
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