LAN91C96 Просмотр технического описания (PDF) - SMSC -> Microchip

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LAN91C96

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

SMSC -> Microchip 

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

8 BIT MODE

((IOis8=1) +

(nEN16=1).

(16BIT=0))

16 BIT MODE

otherwise

Table 5.3 - Bus Transactions In PCMCIA Mode

A0 NCE1

0

0

NCE2

X

D0-7

Even byte

D8-15

-

1

0

X

X

1

X

0

0

0

0

0

1

1

0

1

X

1

0

X

1

1

Odd byte

-

NO CYCLE

Even byte

Odd byte

Even byte

-

Odd byte

-

Odd byte

NO CYCLE

Table 5.4 - Bus Transactions In 68000 Mode

8 BIT MODE

16 BIT MODE

(A0=0).(nSBHE=0)

D0-7

D8-15

ILLEGAL ACCESS

Even byte

Odd byte

16BIT:

IOis8:

nEN16:

8 Bit mode:

CONFIGURATION REGISTER bit 7

CSR register bit 5

pin nEN16

((IOis8 = 1) + (nMIS16 = 1)

5.2

Interrupt Structure

The Ethernet interrupt is conceptually equivalent to the LAN91C94 interrupt line, it is the or function of all

enabled interrupts within the Ethernet core. The enabling, reporting, and clearing of these sources is

controlled by the ECOR register. The interrupt structure is similar for LOCAL BUS and PCMCIA modes

with the following exceptions:

PCMCIA uses a single interrupt pin (nIREQ) while LOCAL BUS can use any of four INTR0-3 pins.

Rev. 09/10/2004

Page 30

DATASHEET

SMSC LAN91C965v&3v

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