LAN91C96 Просмотр технического описания (PDF) - SMSC -> Microchip
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LAN91C96 Datasheet PDF : 125 Pages
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Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
CLOCK
t1
t2
t2
tR
tF
Figure 12.26 – Input Clock Timing
NAME
t1
t2
tR, tF
DESCRIPTION
Clock Cycle Time for 20 MHz
Clock High Time/Low Time for 20 MHz
Clock Rise Time/Fall Time
Xtal1 Startup time (from 1.6v of Vcc rising)
Xtal1 Capture Range (Xtal1 frequency
variation)
Xtal Internal feedback resistor
MIN
30/20
19.7
1
TYP
50
MAX
20/30
5
50
20.3
UNITS
ns
ns
ns
msec
MHz
3
Meg Ohm
ADDRESS
DATA
REGISTER
nIOWR
t45
POINTER
REGISTER
Parameter
t45 Last Access to Data Register to Pointer
Reloaded
min
typ
2 * t20
max
units
ns
Figure 12.27 – Memory Write Timing
Rev. 09/10/2004
Page 122
DATASHEET
SMSC LAN91C965v&3v
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