IR3Y48A1 Просмотр технического описания (PDF) - Sharp Electronics

Номер в каталоге

Компоненты Описание

Список матч

IR3Y48A1

CCD Signal Process & Digital Interface IC

Sharp Electronics 

Black Level Cancel Circuit

The purpose of a black level cancel circuit is to

control the DC level of the PGA input so that the

ADC output code at a optical black period may

correspond to the black level code set up by the

register. The black level code of (1 to) 16 to 127

LSB (default : 64 LSB) is available.

A black level cancel loop is established while the

OBP pin is active. In this loop, the ADC output

code is compared with the black level code and the

voltage of the OBCAP capacitor is controlled by the

result. Thus, the OBCAP voltage settles gradually,

and the signal level of the optical black period

corresponds to the established value.

The charge of the OBCAP capacitor is reset under

IR3Y48A1

following conditions :

q Set the black level reset register to "1".

[Mode (1) Register D1 = 1]

w Set the RESET pin to low.

e Power down (by the STBYN pin or register

control)

The DC clamping [CCDCLP] is allowed while the

OBP pin is low.

The black level cancellation is also available in

"ADIN signal to PGA" mode. (See the broken line

path of "Black Level Calibration" below.) The

black level cancellation is available at the ADCLP

period in this mode. (That means a clamping and a

black level cancelling are done simultaneously.)

REFIN

CCDIN

ADIN

OBCAP

CDS

S/H

PGA

Rough

+

PGA

Fine

10-bit

ADC

(Path for ADIN)

DAC

OBP

ADCLP

OBP ADCLP

Compare

Black Level

Register

Black Level Calibration

DO0 to DO9

CCD

Blanking

Effective

Pixel Signal

Optical Black Period

Blanking

Effective

Pixel Signal

ADCK

OBP

OBCAP

Previous

Black Level

Black Level Calibration Timing

9

Resulting Black

Calibration Level

(Hold)

Share Link: