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IDT821034

QUAD PCM CODEC WITH PROGRAMMABLE GAIN

Integrated Device Technology 

IDT821034 QUAD PCM CODEC WITH PROGRAMMABLE GAIN

INDUSTRIAL TEMPERATURE RANGE

FUNCTIONAL DESCRIPTION

The IDT821034 contains four channel PCM CODEC with on chip digital

filters. It provides the four-wire solution for the subscriber line circuitry in

digital switches. The device converts analog voice signal into digital PCM

samples, and converts digital PCM samples back to analog signal. Digital

filters are used to bandlimit the voice signals during conversion.

The frequency of the master clock (MCLK) can be 2.048 MHz, 4.096

MHz or 8.192 MHz. Internal circuitry determines the master clock frequency

automatically.

Four channels of serial PCM data are time multiplexed via two pins, DX

and DR. The time slots of the four channels can be programmed

dynamically. The control words can be written by a microcontroller via the

Serial Control Interface. Dynamic time-slot assignment can accommodate

8 to 128 time slots corresponding to the bit clock (BCLK) frequency from

512 kHz to 8.192 MHz.

The IDT821034 offers two timing modes, delay mode and non-delay

mode. Mode selection is done by programming the Configuration Register.

The two modes are distinguished by time slot zero definition. In delay

mode, the time slot zero is defined as starting on the first rising edge of

BCLK after FS = ‘1’ is detected by the falling edge of BCLK (Figure 7).

While in non-delay mode, the time slot zero starts when both BCLK and

FS are high (Figure 8).

The device provides a programmable interface to SLIC (Subscriber Line

Interface Circuit). Each channel of the IDT821034 has three output pins

and two I/O pins for SLIC signaling. These interface pins are mapped to

internal registers and are accessed by the microcontroller via the Serial

Control Interface. In this way, the IDT821034 provides high level of

integration in line card design.

The Serial Control Interface of IDT821034 consists of four pins (CI,

CO, CS and CCLK), as shown in Figure 1, for the communication to a

microcontroller. Via this interface, the microcontroller can control the

CODEC and SLIC working modes as well as monitor the SLIC status.

OPERATION CONTROL

The following operation description applies to all four channels of the

IDT821034.

information retain the data in this mode.

Each of the four channels in the IDT821034 can be in either normal

mode or standby mode. The mode selection of each channel is done by

the microcontroller via the Serial Control Interface. When in normal mode,

each channel of the IDT821034 is able to transmit and receive both PCM

and analog information. This is the operating mode when a telephone call

is in progress.

Gain Programming

Transmit gain and receive gain of each channel in IDT821034 can be

varied by programming DSP digital filter coefficients. Transmit gain can be

varied within the range of -3 dB to +13 dB; while receive gain can be

varied within the range of -13 dB to +3 dB. This function allows the

IDT821034 to be used with SLICs of different gain requirement.

Gain programming coefficient can be written into IDT821034 via Serial

Control Interface. The detailed operation will be covered in Serial Control

Interface description. The gain programming coefficients should be

calculated as:

Transmit : Coeff_X = round [ gain_X0dB × gain_X ]

Receive: Coeff_R = round [ gain_R0dB × gain_R ]

where:

gain_X0dB = 1820;

gain_X is the target gain;

Coeff_X should be in the range of 0 to 8192.

gain_R0dB = 2506;

gain_R is the target gain;

Coeff_R should be in the range of 0 to 8192.

A gain programming coefficient is 14-bit wide and in binary format. The

7 Most Significant Bits of the coefficient is called GA_MSB_Transmit for

transmit path, or is called GA_MSB_Receive for receive path; The 7 Least

Significant Bits of the coefficient is called GA_LSB_ Transmit for transmit

path, or is called GA_LSB_Receive for receive path.

An example is given below to clarify the calculation of the coefficient. To

program a +3 dB gain in transmit path and a -3.5 dB gain in receive path:

Linear Code of +3 dB

= 103/20

= 1.412537545

Initial State

The IDT821034 has a built-in power on reset circuit. After initial power

up, the device defaults to the following mode:

1. A-law is selected;

2. Delay mode is selected;

3. I/O pins of SLIC interface are set to input mode;

4. SLIC Control and Status Register bits are set to ‘0’;

5. All four channels are placed in standby mode;

6. All transmit and receive time slots are disabled with Time Slot Reg-

isters set to zero;

7. DX is set to high impedance state.

Operating Modes

There are two operating modes for each transmit or receive channel:

standby mode and normal mode. When the IDT821034 is first powered

on, standby mode is the default mode. Microcontroller can also set the

device into this mode via the Serial Control Interface. In standby mode, the

Serial Control Interface remains active to receive commands from the

microcontroller. All other circuits are powered down with the analog outputs

placed in high impedance state. All circuits which contain programmed

Coeff_X

= round (1820 × 1.412537545)

= 2571

= 0010100, 0001011

(in binary format )

GA_MSB_Transmit = 0010100

GA_LSB_Transmit = 0001011

Linear Code of -3.5 dB = 10(-3.5/20)

= 0.668343917

Coeff_R

= round (2506 × 0.668343917)

= 1675

= 0001101, 0001011

(in binary format)

GA_MSB_Receive

GA_LSB_Receive

= 0001101

= 0001011

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