IDT7M1002
16K x 32 CMOS DUAL-PORT STATIC RAM MODULE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF READ WITH BUSY (M/S ≥ VIH)(2)
ADDR R
R/W R
DATAIN R
ADDR L
tAPS (1)
BUSY L
DATAOUT L
NOTES:
1. To ensure that the earlier of the two ports wins.
2. (L_ CS = R_ CS) ≤ VIL
3. OE ≤ VIL for the reading port.
tWC
MATCH
tWP
tDW
VALID
MATCH
tDH
tBDA
tBDD
tDDD (3)
tWDD
TIMING WAVEFORM OF WRITE WITH PORT-TO-PORT DELAY (M/S ≤ VIH)(1, 2)
VALID
2795 drw 11
ADDR R
R/W R
DATAIN R
tWC
MATCH
tWP
tDW
tDH
VALID
ADDR L
DATAOUT L
NOTES:
1. BUSY input equals HIGH for the writing port.
2. (L_ CS = R_ CS) ≤ VIL
MATCH
tDDD
tWDD
VALID
2795 drw 12
7.02
9