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IDT71016S(2013) Просмотр технического описания (PDF) - Integrated Device Technology

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IDT71016S
(Rev.:2013)
IDT
Integrated Device Technology IDT
IDT71016S Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
IDT71016, CMOS Static RAM
1 Meg (64K x 16-bit)
Commercial and Industrial Temperature Ranges
AC Electrical Characteristics (VCC = 5.0V ± 10%, Commercial and Industrial Range)
71016S12 (2)
71016S15
71016S20
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Unit
READ CYCLE
tRC
Read Cycle Time
12
____
15
____
20
____
ns
tAA
Address Access Time
____
12
____
15
____
20
ns
tACS
Chip Select Access Time
____
12
____
15
____
20
ns
tCLZ(1)
Chip Select Low to Output in Low-Z
4
____
5
____
5
____
ns
tCHZ(1)
Chip Select High to Output in High-Z
____
6
____
6
____
8
ns
tOE
Output Enable Low to Output Valid
____
7
____
8
____
10
ns
tOLZ(1)
Output Enable Low to Output in Low-Z
0
____
0
____
0
____
ns
tOHZ(1)
Output Enable High to Output in High-Z
____
6
____
6
____
8
ns
tOH
Output Hold from Address Change
4
____
4
____
5
____
ns
tBE
Byte Enable Low to Output Valid
____
7
____
8
____
10
ns
tBLZ(1)
Byte Enable Low to Output in Low-Z
0
____
0
____
0
____
ns
tBHZ(1)
Byte Enable High to Output in High-Z
____
6
____
6
____
8
ns
WRITE CYCLE
tWC
Write Cycle Time
12
____
15
____
20
____
ns
tAW
Address Valid to End of Write
9
____
10
____
12
____
ns
tCW
Chip Select Low to End of Write
9
____
10
____
12
____
ns
tBW
Byte Enable Low to End of Write
9
____
10
____
12
____
ns
tAS
Address Set-up Time
0
____
0
____
0
____
ns
tWR
Address Hold from End of Write
0
____
0
____
0
____
ns
tWP
Write Pulse Width
9
____
10
____
12
____
ns
tDW
Data Valid to End of Write
7
____
8
____
10
____
ns
tDH
Data Hold Time
0
____
0
____
0
____
ns
tOW(1)
Write Enable High to Output in Low-Z
1
____
1
____
1
____
ns
tWHZ(1)
Write Enable Low to Output in High-Z
____
6
____
6
____
8
ns
NOTE:
1. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
2. 12ns commercial only.
3210 tbl 10
Timing Waveform of Read Cycle No. 1(1,2,3)
tRC
ADDRESS
DATAOUT
tAA
tOH
PREVIOUS DATAOUT VALID
NOTES:
1. WE is HIGH for Read Cycle.
2. Device is continuously selected, CS is LOW.
3. OE, BHE, and BLE are LOW.
6.452
tOH
DATAOUT VALID
, 3210 drw 06

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