IDT7006S(2018) Просмотр технического описания (PDF) - Integrated Device Technology

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IDT7006S
(Rev.:2018)

HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM

Integrated Device Technology 

IDT7006S/L

High-Speed 16K x 8 Dual-Port Static RAM

Military, Industrial and Commercial Temperature Ranges

Timing Waveform of Semaphore Read after Write Timing, Either Side(1)

tSAA

tOH

A0-A2

SEM

VALID ADDRESS

tAW

tWR

tEW

VALID ADDRESS

tACE

DATA0

R/W

tDW

tSOP

DATAIN VALID

tAS

tWP

tDH

DATAOUT

VALID

tSWRD

OE

Write Cycle

NOTE:

1. CE = VIH for the duration of the above timing (both write and read cycle).

tSOP

Read Cycle

tAOE

2739 drw 11

Timing Waveform of Semaphore Write Contention(1,3,4)

A0"A"-A2"A"

MATCH

SIDE(2) “A”

R/W"A"

SEM"A"

A0"B"-A2"B"

SIDE(2) “B”

R/W"B"

tSPS

MATCH

SEM"B"

2739 drw 12

NOTES:

1. DOR = DOL = VIL, CER = CEL = VIH, Semaphore Flag is released from both sides (reads as ones from both sides) at cycle start.

2. All timing is the same for left and right ports. Port “A” may be either left or right port. Port “B” is the opposite from port “A”.

3. This parameter is measured from R/W"A" or SEM"A" going HIGH to R/W"B" or SEM"B" going HIGH.

4. If tSPS is not satisfied, the semaphore will fall positively to one side or the other, but there is no guarantee which side will obtain the flag.

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