ICS9148-11 Просмотр технического описания (PDF) - Integrated Circuit Systems
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ICS9148-11 Datasheet PDF : 14 Pages
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ICS9148 - 11
Select Functions
FUNCTION
DESCRIPTION
Tri - State
Test Mode
CPU
Hi-Z
TCLK/21
PCI,
PCI_F
Hi-Z
TCLK/41
OUTPUTS
SDRAM
Hi-Z
TCLK/21
Notes:
1. REF is a test clock on the X1 inputs during test mode.
REF
Hi-Z
TCLK1
IOAPIC
Hi-Z
TCLK1
Byte 1: CPU Clock Register
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
-
-
-
-
40
41
43
44
PWD
1
1
1
1
1
1
1
1
DESCRIPTION
Reserved
Reserved
Reserved
Reserved
CPUCLK3 (Act/Inact)
CPUCLK2 (Act/Inact)
CPUCLK1 (Act/Inact)
CPUCLK0 (Act/Inact)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 3: SDRAM Clock Register
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
28
29
31
32
34
35
37
38
PWD
1
1
1
1
1
1
1
1
DESCRIPTION
SDRAM7 (Act/Inact)
Desktop only
SDRAM6 (Act/Inact)
Desktop only
SDRAM5 (Act/Inact)
Desktop only
SDRAM4 (Act/Inact)
SDRAM3 (Act/Inact)
SDRAM2 (Act/Inact)
SDRAM1 (Act/Inact)
SDRAM0 (Act/Inact)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 2: PCICLK Clock Register
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
-
7
15
13
12
11
10
8
PWD
1
1
1
1
1
1
1
1
DESCRIPTION
Reserved
PCICLK_F (Act/Inact)
PCICLK5 (Act/Inact)
PCICLK4 (Act/Inact)
PCICLK3 (Act/Inact)
PCICLK2 (Act/Inact)
PCICLK1 (Act/Inact)
PCICLK0 (Act/Inact)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 4: SDRAM Clock Register
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
-
-
-
-
17
18
20
21
PWD
1
1
1
1
1
1
1
1
DESCRIPTION
Reserved
Reserved
Reserved
Reserved
SDRAM11 (Act/Inact)
SDRAM10 (Act/Inact)
SDRAM9 (Act/Inact)
SDRAM8 (Act/Inact)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Note: PWD = Power-Up Default
6
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